wm8953 Wolfson Microelectronics plc, wm8953 Datasheet - Page 57

• Manufacturer Part Number: wm8953
• Description: Low Power Stereo Adc With Pll And Tdm Interface Low Power Stereo Adc With Pll And Tdm Interface
• Manufacturer: Wolfson Microelectronics plc

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Production Data
Figure 31 Audio Interface Output Control
The Audio Interface output control is illustrated above. The master mode control register AIF_MSTR
and the left-right clock control register ADCLRC_DIR determine whether the WM8953 generates the
associated clocks. These registers are described in Table 32 below.
Table 32 Audio Interface Output Function Control
OPERATION WITH TDM
Time division multiplexing (TDM) allows multiple devices to transfer data simultaneously on the same
bus. The WM8953 supports TDM in master and slave modes for all data formats and word lengths.
TDM is enabled using register bit AIFADC_TDM. The TDM data slot is programmed using register bit
AIFADC_TDM_CHAN.
R8 (08h)
REGISTER
ADDRESS
15
11
BIT
AIF_MSTR
ADCLRC_DIR
LABEL
0b
0b
DEFAULT
Audio Interface Master Mode Select
0 = Slave mode
1 = Master mode
ADCLRC Direction
(Forces ADCLRC clock to be output in
slave mode)
0 = ADCLRC normal operation
1 = ADCLRC clock output enabled
DESCRIPTION
PD, January 2009, Rev 4.0
WM8953
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