wm8953 Wolfson Microelectronics plc, wm8953 Datasheet - Page 64

• Manufacturer Part Number: wm8953
• Description: Low Power Stereo Adc With Pll And Tdm Interface Low Power Stereo Adc With Pll And Tdm Interface
• Manufacturer: Wolfson Microelectronics plc

WM8953
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MASTER MODE BCLK AND ADCLRC ENABLE
The audio interface pins BCLK, ADCLRC and ADCDAT can be independently programmed to
operate in master mode or slave mode using register bit AIF_MSTR.
When the audio interface is operating in slave mode, the BCLK and ADCLRC clock outputs to these
pins are by default disabled to allow the digital audio source to drive these pins.
It is also possible to force the ADCLRC to be output using register bit ADCLRC_DIR, allowing mixed
master and slave mode.
The clock generators for the audio interface are enabled according to the control signals shown in
Figure 47.
Figure 47 Clock Output Control
Table 35 Digital Audio Interface Clock Output Control
R8 (08h)
REGISTER
ADDRESS
15
11
10:0
BIT
AIF_MSTR
ADCLRC_DIR
ADCLRC_RATE
[10:0]
LABEL
0b
0b
040h
DEFAULT
Audio Interface Master Mode Select
0 = Slave mode
1 = Master mode
ADCLRC Direction
(Forces ADCLRC clock to be output in
slave mode)
0 = ADCLRC normal operation
1 = ADCLRC clock output enabled
ADCLRC clock output = BCLK /
ADCLRC_RATE
Integer (LSB = 1)
Valid from 8..2047
ADCLRC Rate
DESCRIPTION
PD, January 2009, Rev 4.0
Production Data
64