wm8953 Wolfson Microelectronics plc, wm8953 Datasheet - Page 21

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wm8953

Manufacturer Part Number
wm8953
Description
Low Power Stereo Adc With Pll And Tdm Interface Low Power Stereo Adc With Pll And Tdm Interface
Manufacturer
Wolfson Microelectronics plc
Datasheet
w
Production Data
CONTROL INTERFACE TIMING – 3-WIRE MODE
Figure 7 Control Interface Timing – 3-Wire Serial Control Mode (Write Cycle)
Figure 8 Control Interface Timing – 3-Wire Serial Control Mode (Read Cycle)
Test Conditions
DCVDD=1.8V, DBVDD=AVDD=3.3V, DGND=AGND=0V, T
otherwise stated.
Program Register Input Information
CSB falling edge to SCLK rising edge
SCLK falling edge to CSB rising edge
SCLK pulse cycle time
SCLK pulse width low
SCLK pulse width high
SDIN to SCLK set-up time
SDIN to SCLK hold time
Pulse width of spikes that will be suppressed
SCLK falling edge to SDOUT transition
SDOUT
SCLK
CSB
PARAMETER
3-wire mode is selected by connecting the MODE pin high.
t
DL
A
=+25
SYMBOL
t
t
t
t
t
t
t
CHO
DHO
CSU
SCY
SCL
SCH
DSU
t
t
DL
ps
o
C, Slave Mode, fs=48kHz, MCLK=256fs, 24-bit data, unless
MIN
200
40
40
80
80
40
10
0
LSB
TYP
PD, January 2009, Rev 4.0
MAX
40
5
WM8953
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
21

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