wm8953 Wolfson Microelectronics plc, wm8953 Datasheet - Page 25

• Manufacturer Part Number: wm8953
• Description: Low Power Stereo Adc With Pll And Tdm Interface Low Power Stereo Adc With Pll And Tdm Interface
• Manufacturer: Wolfson Microelectronics plc

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Production Data
DEVICE DESCRIPTION
INTRODUCTION
The WM8953 is a low power, high quality audio ADC designed to interface with a wide range of
processors and analogue components. A high level of mixed-signal integration in a very small
3.226x3.44mm footprint makes it ideal for portable applications such as mobile phones.
Eight highly flexible analogue inputs allow interfacing to up to four microphone inputs plus multiple
stereo or mono line inputs (single-ended or differential).
The stereo ADCs are of hi-fi quality using a 24-bit, low-order oversampling architecture to deliver
optimum performance. A flexible clocking arrangement supports a wide variety of clock inputs and
sample rates; the integrated ultra-low power PLL provides additional flexibility. A high pass filter is
available in the ADC path for removing DC offsets and suppressing low frequency noise such as
mechanical vibration and wind noise.
The WM8953 has a highly flexible digital audio interface, supporting a number of protocols, including
I
supported in the DSP mode. A-law and µ-law companding are also supported. Time division
multiplexing (TDM) is available to allow multiple devices to stream data simultaneously on the same
bus, saving space and power.
The SYSCLK (system clock) provides clocking for the ADCs, DSP core and the digital audio
interface. SYSCLK can be derived directly from the MCLK pin or via an integrated PLL, providing
flexibility to support a wide range of clocking schemes. All MCLK frequencies typically used in
portable systems are supported for sample rates between 8kHz and 48kHz.
To allow full software control over all its features, the WM8953 uses a standard 2-wire or 3/4-wire
control interface with readback of key registers supported. It is fully compatible and an ideal partner
for a wide range of industry standard microprocessors, controllers and DSPs. Unused circuitry can
be disabled via software to save power, while low leakage currents extend standby and off time in
portable battery-powered applications. The device address can be selected using the CSB/ADDR
pin.
Versatile GPIO functionality is provided, with support for up to five button/accessory detect inputs
with interrupt and status readback and flexible de-bouncing options, clock output, and logic '1' / logic
'0' for control of additional external circuitry.
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S, DSP, MSB-first left/right justified, and can operate in master or slave modes. PCM operation is
PD, January 2009, Rev 4.0
WM8953
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