wm8953 Wolfson Microelectronics plc, wm8953 Datasheet - Page 51

• Manufacturer Part Number: wm8953
• Description: Low Power Stereo Adc With Pll And Tdm Interface Low Power Stereo Adc With Pll And Tdm Interface
• Manufacturer: Wolfson Microelectronics plc

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Production Data
SERIAL DATA OUTPUT (REGISTER READBACK)
The GPIO pins can be configured to output serial data during register readback in 3-wire (open-drain)
or 4-wire mode. The readback mode is configured using the register bits RD_3W_ENA and
MODE_3W4W as described in Table 31.
Setting the RD_3W_ENA bit to 1 enables 3-wire readback using the SDIN pin in open-drain mode.
Setting the RD_3W_ENA bit to 0 requires the use of a GPIO pin as SDOUT. To enable SDOUT on a
GPIO pin, the following register settings are required:
The register fields used to configure SDOUT on the GPIO pins are described in Table 31. Refer to
“Control Interface” for more details of 3-wire and 4-wire interfacing.
Table 31 GPIO 3-Wire Readback Enable
R22 (16h)
REGISTER
ADDRESS
•
•
•
•
AIF_TRIS = 0
GPIOn_SEL = 0110 for the selected SDOUT output pin
GPIOn_PU = 0 for the selected SDOUT output pin
GPIOn_PD = 0 for the selected SDOUT output pin
15
14
BIT
RD_3W_ENA
MODE_3W4W
LABEL
1b
0b
DEFAULT
3- / 4-wire readback configuration
1 = 3-wire mode
0 = 4-wire mode, using GPIO pin
3-wire mode
4-wire mode
0 = push 0/1
1 = open-drain
0 = push 0/1
1 = wired-OR
DESCRIPTION
PD, January 2009, Rev 4.0
WM8953
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