wm8953 Wolfson Microelectronics plc, wm8953 Datasheet - Page 46

• Manufacturer Part Number: wm8953
• Description: Low Power Stereo Adc With Pll And Tdm Interface Low Power Stereo Adc With Pll And Tdm Interface
• Manufacturer: Wolfson Microelectronics plc

WM8953
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Table 24 MICBIAS Current Detect Control
The current detect function operates according to the following the truth table:
Table 25 Truth Table for GPIO Output of MICBIAS Current Detect Function
CLOCK OUTPUT
A clock output (OPCLK) derived from SYSCLK may be output via GPIO3, GPIO4 or GPIO5.
SYSCLK is derived from MCLK (either directly, or in conjunction with the PLL), and is used to provide
all internal clocking for the WM8953 (see "Clocking and Sample Rates" section for more information).
A programmable clock divider OPCLKDIV controls the frequency of the OPCLK output. This clock is
enabled by register bit OPCLK_ENA. See “Clocking and Sample Rates” for a definition of this
register field.
To enable clock output via one or more GPIO pins, the following register settings are required:
R22 (16h)
REGISTER
Mic Short Circuit Detect
Mic Short Circuit Detect
Mic Current Detect
Mic Current Detect
ADDRESS
•
•
•
•
AIF_TRIS = 0
GPIOn_SEL = 0001 for the selected GPIO clock output pin
GPIOn_PU = 0 for the selected GPIO clock output pin
GPIOn_PD = 0 for the selected GPIO clock output pin
LABEL
BIT
10
9
MICSHRT_IRQ_ENA
MICDET_IRQ_ENA
LABEL
VALUE
0
1
0
1
MCDSCTH current threshold not exceeded
MCDSCTH current threshold exceeded
MCDTHR current threshold not exceeded
MCDTHR current threshold exceeded
DEFAULT
0b
0b
MICBIAS short circuit detect IRQ Enable
0 = disabled
1 = enabled
MICBIAS current detect IRQ Enable
0 = disabled
1 = enabled
DESCRIPTION
PD, January 2009, Rev 4.0
DESCRIPTION
Production Data
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