UPD45128163-A75L ELPIDA [Elpida Memory], UPD45128163-A75L Datasheet - Page 11
UPD45128163-A75L
Manufacturer Part Number
UPD45128163-A75L
Description
128M-bit Synchronous DRAM 4-bank, LVTTL
Manufacturer
ELPIDA [Elpida Memory]
Datasheet
1.UPD45128163-A75L.pdf
(86 pages)
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Self refresh entry command
CKE remains low. When CKE goes high, the PD45128xxx exits the
self refresh mode.
performed internally, so there is no need for external control.
Burst stop command
No operation
or terminate by this command.
After the command execution, self refresh operation continues while
During self refresh mode, refresh interval and refresh operation are
Before executing self refresh, all banks must be precharged.
This command can stop the current burst operation.
This command is not an execution command. No operations begin
(/CS, /RAS, /CAS, CKE = Low, /WE = High)
(/CS, /WE = Low, /RAS, /CAS = High)
(/CS = Low, /RAS, /CAS, /WE = High)
Data Sheet E0344N10 (Ver. 1.0)
Fig.8 Burst stop command in Full Page
Fig.7 Self refresh entry command
BA0(A13), BA1(A12)
BA0(A13), BA1(A12)
BA0(A13), BA1(A12)
Fig.9 No operation
/RAS
/CAS
/RAS
/CAS
/RAS
/CAS
CKE
CKE
CKE
CLK
CLK
CLK
/WE
/WE
/WE
A10
Add
A10
Add
A10
Add
/CS
/CS
/CS
Mode
H
H
PD45128163
11
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