UPD45128163-A75L ELPIDA [Elpida Memory], UPD45128163-A75L Datasheet - Page 9

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UPD45128163-A75L

Manufacturer Part Number
UPD45128163-A75L
Description
128M-bit Synchronous DRAM 4-bank, LVTTL
Manufacturer
ELPIDA [Elpida Memory]
Datasheet
2. Commands
Mode register set command
operates. In this command, A0 through A11, BA0(A13) and BA1(A12)
are the data input pins.
command must be executed to initialize the device.
cannot accept any other commands.
Activate command
BA1(A12) and a row address selected by A0 through A11.
Precharge command
BA0(A13) and BA1(A12). When A10 is High, all banks are
precharged, regardless of BA0(A13) and BA1(A12). When A10 is
Low, only the bank selected by BA0(A13) and BA1(A12) is
precharged.
command to the precharging bank during t
command period).
The PD45128xxx has a mode register that defines how the device
The mode register can be set only when all banks are in idle state.
During 2 CLK (t
The PD45128xxx has four banks, each with 4,096 rows.
This command activates the bank selected by BA0(A13) and
This command corresponds to a conventional DRAM’s /RAS falling.
This command begins precharge operation of the bank selected by
After this command, the PD45128xxx can’t accept the activate
This command corresponds to a conventional DRAM’s /RAS rising.
(/CS, /RAS, /CAS, /WE = Low)
(/CS, /RAS = Low, /CAS, /WE = High)
(/CS, /RAS, /WE = Low, /CAS = High)
RSC
) following this command, the
After power on, the mode register set
RP
(precharge to activate
Data Sheet E0344N10 (Ver. 1.0)
PD45128xxx
Fig.1 Mode register set command
BA0(A13), BA1(A12)
BA0(A13), BA1(A12)
BA0(A13), BA1(A12)
Fig.2 Row address strobe and
Fig.3 Precharge command
(Precharge select)
bank activate command
/RAS
/CAS
/RAS
/CAS
/RAS
/CAS
CKE
CKE
CKE
CLK
CLK
CLK
/WE
/WE
/WE
A10
Add
A10
Add
A10
Add
/CS
/CS
/CS
H
H
H
Row
Row
PD45128163
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