UPD45128163-A75L ELPIDA [Elpida Memory], UPD45128163-A75L Datasheet - Page 36

• Manufacturer Part Number: UPD45128163-A75L
• Description: 128M-bit Synchronous DRAM 4-bank, LVTTL
• Manufacturer: ELPIDA [Elpida Memory]

Asynchronous Characteristics
Note 1. The –A75A and –A75 grade device can satisfy the t
36
ACT to REF/ACT command period (operation)
REF to REF/ACT command period (refresh)
ACT to PRE command period
PRE to ACT command period
Delay time ACT to READ/WRITE command
ACT (one) to ACT (another) command period
Data-in to PRE command period
Data-in to ACT (REF)
command period
(Auto precharge)
Mode register set cycle time
Transition time
Refresh time (4,096 refresh cycles)
operation.
Parameter
/CAS latency = 3 t
/CAS latency = 2 t
Symbol
t
t
t
t
t
t
t
DAL3
DAL2
t
t
RCD
RRD
RSC
RC1
RAS
DPL
REF
RC
RP
t
T
Data Sheet E0344N10 (Ver. 1.0)
1CLK
+22.5
1CLK
MIN.
+20
0.5
60
60
45
15
15
15
8
2
-A 75A
120,000
MAX.
30
64
DAL3
1CLK
+22.5
1CLK
MIN.
67.5
67.5
+20
0.5
45
20
20
15
8
2
spec of 1CLK+20 ns for up to and including 125MHz
-A 75
120,000
MAX.
30
64
1CLK
1CLK
MIN.
+20
+20
0.5
70
70
48
20
20
16
8
2
-A 80
120,000
MAX.
30
64
1CLK
1CLK
MIN.
+20
+20
70
70
50
20
20
20
10
2
1
-A 10
120,000
MAX.
30
64
PD45128163
CLK
Unit
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Note
1