UPD45128163-A75L ELPIDA [Elpida Memory], UPD45128163-A75L Datasheet - Page 17

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UPD45128163-A75L

Manufacturer Part Number
UPD45128163-A75L
Description
128M-bit Synchronous DRAM 4-bank, LVTTL
Manufacturer
ELPIDA [Elpida Memory]
Datasheet
4.5 Command Truth Table for CKE
Notes 1. Self refresh can be entered only from the all banks idle state. Power down can be entered only from all
Remark H = High level, L = Low level,
Self refresh
Self refresh recovery
Power down
All banks idle
Row active
Any state other than
listed above
Current State
2. Must be legal command as defined in Operative Command Table.
banks idle or row active state.
n – 1
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
L
L
L
L
CKE
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
n
L
L
L
L
L
L
L
L
L
L
L
L
L
/CS /RAS /CAS /WE
H
H
H
H
H
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
L
= High or Low level (Don't care)
Data Sheet E0344N10 (Ver. 1.0)
H
H
H
H
H
H
L
L
L
L
L
L
L
H
H
H
L
L
Op-Code
Op-Code
Address
INVALID, CLK (n – 1) would exit self refresh
Self refresh recovery
Self refresh recovery
ILLEGAL
ILLEGAL
Maintain self refresh
Idle after t
Idle after t
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
INVALID, CLK (n – 1) would exit power down
EXIT power down
EXIT power down
Maintain power down mode
Refer to operations in Operative Command Table
Refer to operations in Operative Command Table
Refer to operations in Operative Command Table
CBR (auto) Refresh
Refer to operations in Operative Command Table
Refer to operations in Operative Command Table
Refer to operations in Operative Command Table
Refer to operations in Operative Command Table
Self refresh
Refer to operations in Operative Command Table
Power down
Refer to operations in Operative Command Table
Power down
Refer to operations in Operative Command Table
Begin clock suspend next cycle
Exit clock suspend next cycle
Maintain clock suspend
RC
RC
Action
Idle
Idle
PD45128163
Notes
1
1
1
2
17

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