UPD45128163-A75L ELPIDA [Elpida Memory], UPD45128163-A75L Datasheet - Page 85

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UPD45128163-A75L

Manufacturer Part Number
UPD45128163-A75L
Description
128M-bit Synchronous DRAM 4-bank, LVTTL
Manufacturer
ELPIDA [Elpida Memory]
Datasheet
1
2
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Exposing the MOS devices to a strong electric field can cause destruction of the gate
oxide and ultimately degrade the MOS devices operation. Steps must be taken to stop
generation of static electricity as much as possible, and quickly dissipate it, when once
it has occurred. Environmental control must be adequate. When it is dry, humidifier
should be used. It is recommended to avoid using insulators that easily build static
electricity. MOS devices must be stored and transported in an anti-static container,
static shielding bag or conductive material. All test and measurement tools including
work bench and floor should be grounded. The operator should be grounded using
wrist strap. MOS devices must not be touched with bare hands. Similar precautions
need to be taken for PW boards with semiconductor MOS devices on it.
PRECAUTION AGAINST ESD FOR MOS DEVICES
HANDLING OF UNUSED INPUT PINS FOR CMOS DEVICES
STATUS BEFORE INITIALIZATION OF MOS DEVICES
No connection for CMOS devices input pins can be a cause of malfunction. If no
connection is provided to the input pins, it is possible that an internal input level may be
generated due to noise, etc., hence causing malfunction. CMOS devices behave
differently than Bipolar or NMOS devices. Input levels of CMOS devices must be fixed
high or low by using a pull-up or pull-down circuitry. Each unused pin should be connected
to V
pin. The unused pins must be handled in accordance with the related specifications.
Power-on does not necessarily define initial status of MOS devices. Production process
of MOS does not define the initial operation status of the device. Immediately after the
power source is turned ON, the MOS devices with reset function have not yet been
initialized. Hence, power-on does not guarantee output pin levels, I/O settings or
contents of registers. MOS devices are not initialized until the reset signal is received.
Reset operation must be executed immediately after power-on for MOS devices having
reset function.
DD
or GND with a resistor, if it is considered to have a possibility of being an output
NOTES FOR CMOS DEVICES
Data Sheet E0344N10 (Ver. 1.0)
PD45128163
CME0107
85

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