UPD75238GJ

Manufacturer Part NumberUPD75238GJ
Description4 BIT SINGLE-CHIP MICROCOMPUTER
ManufacturerNEC [NEC]
UPD75238GJ datasheet
 
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Table 7-1 Statuses of the Hardware after a Reset (1/2)
Hardware
Program counter (PC)
PSW
Carry flag (CY)
Skip flags (SK0 to SK2)
Interrupt status flags (IST1, IST2)
Bank enable flags (MBE, RBE)
Data memory (RAM)
General registers (X, A, H, L, D, E, B, C)
Bank select register (MBS, RBS)
Stack pointer (SP)
Stack bank select register (SBS)
Basic interval
Counter (BT)
timer
Mode register (BTM)
Timer/event
Counter (T0)
counter
Modulo register (TMOD0)
Mode register (TM0)
TOE0, TOUT F/F
Watch timer
Mode register (WM)
Timer/pulse
Modulo registers (MODH, MODL)
generator
Mode register (TPGM)
Event counter
Counter (T1)
Mode register (TM1)
Gate control register (GATEC)
Serial interface
Shift register (SIO0)
(Channel 0)
Operation mode register
(CSIM0)
SBI control register (SBIC)
Slave address register (SVA)
P01/SCK0 output latch
Serial interface
Shift register (SIO1)
(Channel 1)
Operation mode register
(CSIM1)
Serial transfer end flag (EOT)
148
RESET input in a standby mode
RESET input during operation
Low-order 6 bits at address 0000H
Low-order 6 bits at address 0000H
in program memory are set in PC
in program memory are set in PC
bits 13 to 8, and the data at address
bits 13 to 8, and the data at address
0001H are set in PC bits 7 to 0.
0001H are set in PC bits 7 to 0.
Held
Undefined
0
0
0
0
Bit 6 at address 0000H in pro-
Bit 6 at address 0000H in pro-
gram memory is set in RBE, and
gram memory is set in RBE, and
bit 7 is set in MBE.
bit 7 is set in MBE.
Held
Undefined
Held
Undefined
0, 0
0, 0
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
0
0
0
0
FFH
FFH
0
0
0, 0
0, 0
0
0
Held
Held
0
0
0
0
0
0
0
0
Held
Undefined
0
0
0
0
Held
Undefined
1
1
Held
Undefined
0
0
0
0
PD75238