UPD75238GJ NEC [NEC], UPD75238GJ Datasheet - Page 48

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UPD75238GJ

Manufacturer Part Number
UPD75238GJ
Description
4 BIT SINGLE-CHIP MICROCOMPUTER
Manufacturer
NEC [NEC]
Datasheet
Fig. 4-12 Formats of the Port Mode Registers
Address
7
6
FE8H
PM63
PM62
Symbol
PM3n, PM6n
PMGA
0
1
Address
7
6
FECH
PM7
Symbol
PMn
0
PMGB
1
Remark ——: Don’t care
(4) Pull-up resistor register group A (POGA)
Pull-up resistor register group A is a register to specify an internal pull-up register to each port pin of ports
0 to 3 and port 6 (excluding P00). Fig. 4-13 shows the format of this register.
When a pull-up resistor is to be contained, set 1 to an associated bit, and when a pull-up resistor is not
to be contained, set 0.
Fig. 4-13 Format of the Register Group A Specifying the Use of Pull-Up Resistors
Address
7
6
FDCH
PO6
Caution For mask option, ports 4 and 5 can contain pull-up resistors, and port 7 and ports 10 to 15 can
contain pull-down resistors bit by bit.
Remark ——: Don’t care
48
Port mode register group A
5
4
3
2
PM61
PM60
PM33
PM32
PM31
P3n and P6n pin I/O specification (n = 0-3)
Input mode (output buffers set off)
Output mode (output buffers set on)
Port mode register group B
5
4
3
2
PM5
PM4
PM2
Port n I/O specification (n = 2, 4, 5, and 7)
Input mode (output buffers set off)
Output mode (output buffers set on)
5
4
3
2
1
PO3
PO2
PO1
PD75238
1
0
Symbol
PM30
PMGA
1
0
Symbol
PMGB
Symbol
0
PO0
POGA
Port 0 (P01 - P03)
Port 1 (P10 - P13)
Port 2 (P20 - P23)
Port 3 (P30 - P33)
Port 6 (P60 - P63)

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