UPD75238GJ NEC [NEC], UPD75238GJ Datasheet - Page 73

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UPD75238GJ

Manufacturer Part Number
UPD75238GJ
Description
4 BIT SINGLE-CHIP MICROCOMPUTER
Manufacturer
NEC [NEC]
Datasheet
(3) Configuration and operation when the timer/pulse generator is used in the timer mode
Fig. 4-32 shows the configuration when the timer/pulse generator is used in the timer mode.
The timer mode is selected by setting bit 0 of TPGM to 1. In the timer mode, TPGM3 must be set to 1,
allowing a modulo register to be reloaded at any time.
In the timer mode, a prescaler is selected with the modulo register L (MODL), and a frequency or interrupt
interval value is set in the modulo register H (MODH). The timer starts when the TPGM1 is set to 1.
Fig. 4-33 shows the operation timing for the MODH setting, and Table 4-4 shows the setting of a frequency
or interrupt interval.
The output to the PPO pin can be switched between the square wave output and static output. To output
a square wave, set TPGM5 and TPGM7 to 1.
Fig. 4-32 Block Diagram of the Timer/Pulse Generator (Timer Mode)
8
Modulo register L (8)
TPGM3
(Set to 1)
Frequency
divider
f
1/2
X
Prescaler select latch (5)
TPGM1
Clear
Caution
When the timer operating in the timer operation mode is stopped, IRQTPG may be set because
T F/F is set. So, the timer must be stopped with an interrupt being disabled, then IRQTPG must
be cleared.
Internal bus
8
MODL
MODH
Modulo register H (8)
Modulo latch H (8)
8
Match
Comparator (8)
8
CP
Count register (8)
Clear
PD75238
INTTPG
IRQTPG
set signal
Output
buffer
Selec-
T F/F
tor
PPO
Set
TPGM4 TPGM5 TPGM7
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