UPD75238GJ NEC [NEC], UPD75238GJ Datasheet - Page 88
UPD75238GJ
Manufacturer Part Number
UPD75238GJ
Description
4 BIT SINGLE-CHIP MICROCOMPUTER
Manufacturer
NEC [NEC]
Datasheet
1.UPD75238GJ.pdf
(190 pages)
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88
Acknowledge detection flag (R)
Busy enable bit (R/W)
ACKD
BSYE
Examples 1. A command signal is output.
1
2
0
1
The transfer start instruction is executed.
The RESET signal is entered.
2. RELD and CMDD are tested to identify the types of received data and the types of processing
Condition for being cleared (ACKD = 0)
accordingly.
By setting WUP = 1, this interrupt routine is processed only when an address match is found.
CMD :
DATA :
ADRS :
1
2
The busy signal is output after the acknowledge signal in phase with the falling edge of SCK0.
Fig. 4-41 Format of Serial Bus Interface Control Register (SBIC) (3/3)
The busy signal is automatically disabled.
Busy signal output is stopped in phase with the falling edge of SCK0 immediately after clear
instruction execution.
SEL
SET1
SEL
SKF
BR
SKT
BR
• • • • • • • • • • • • • • • •
• • • • • • • • • • • • • • • •
• • • • • • • • • • • • • • • •
MB15
CMDT
MB15
RELD
!ADRS
CMDD
!DATA
; or CLR1 MBE
; RELD test
; CMDD test
; Command analysis
; Data processing
; Address decode
The acknowledge signal (ACK) is detected (in phase
with the rising edge of SCK0).
Condition for being set (ACKD = 1)
PD75238
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