UPD75238GJ NEC [NEC], UPD75238GJ Datasheet - Page 56

• Manufacturer Part Number: UPD75238GJ
• Description: 4 BIT SINGLE-CHIP MICROCOMPUTER
• Manufacturer: NEC [NEC]

56
(6) Time required to change the system clock and CPU clock
SCC
Setting before
switching
0
1
0
The system clock and CPU clock can be changed by using the least significant bit of the SCC and the low-
order two bits of the PCC. This switching is not performed immediately after the contents of the registers
are rewritten, but the system operates with the previous clock for some machine cycles. Accordingly, after
this time period, the STOP instruction must be executed or SCC.3 must be set to 1 to terminate main system
clock generation.
Remarks 1. CPU clock
Caution When the four bits of PCC are set to 0001B ( = f
PCC
1
0
0
1
1
Table 4-2 Maximum Time Required to Change the System Clock and CPU Clock
PCC
2. Time enclosed in parentheses is required when f
the main system clock to the subsystem clock, be sure to manipulate the PCC bits so other than
0001B is set. When the system operates on the subsystem clock, the PCC bits must also be
other than 0001B.
0
0
1
0
1
minimum instruction time (defined as one machine cycle in this manual).
4 machine cycles
8 machine cycles
16 machine cycles
1 machine cycle
SCC0
0
PCC1
0
is supplied to the CPU in the PD75238. The reciprocal of this frequency is a
PCC0
0
1 machine cycle
8 machine cycles
16 machine cycles
Not to be set
SCC0
0
PCC1
0
PCC0
1
Setting after switching
1 machine cycle
4 machine cycles
16 machine cycles
1 machine cycle
SCC0
0
PCC1
X
1
/16), do not set SCC.0 to 1. Before switching
X
PCC0
= 6.0 MHz and f
0
1 machine cycle
4 machine cycles
8 machine cycles
1 machine cycle
SCC0
0
PCC1
1
XT
PCC0
1
= 32.768 kHz.
f
cycles
(3 machine cycles)
Not to be set
f
cycles
(23 machine cycles)
f
cycles
(46 machine cycles)
X
X
X
SCC0
/8f
/4f
/64f
1
XT
XT
XT
machine
machine
PCC1 PCC0
machine
PD75238