LCMXO2-2000HC-4FTG256C Lattice, LCMXO2-2000HC-4FTG256C Datasheet - Page 70

• Manufacturer Part Number: LCMXO2-2000HC-4FTG256C
• Description: FPGA - Field Programmable Gate Array 2112 LUTs 207 IO 3.3V 4 Spd
• Manufacturer: Lattice

Specifications of LCMXO2-2000HC-4FTG256C

• Rohs: yes
• Number Of Gates: 2 K
• Embedded Block Ram - Ebr: 74 Kbit
• Number Of I/os: 207
• Maximum Operating Frequency: 269 MHz
• Operating Supply Voltage: 1.14 V to 3.465 V, 2.375 V to 3.465 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: ftBGA-256
• Distributed Ram: 16 Kbit
• Minimum Operating Temperature: 0 C
• Operating Supply Current: 4.8 mA
• Factory Pack Quantity: 90
• User Flash Memory - Ufm: 80 Kbit

sysCLOCK PLL Timing
f
f
f
f
f
AC Characteristics
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
IN
OUT
OUT2
VCO
PFD
DT
DT_TRIM
PH
OPJIT
SPO
W
LOCK
UNLOCK
IPJIT
HI
LO
STABLE
RST
RSTREC
RST_DIV
RSTREC_DIV
ROTATE-SETUP
Parameter
4
6
2, 5
1, 8
5
7
Input Clock Frequency (CLKI, CLKFB)
Output Clock Frequency (CLKOP, CLKOS,
CLKOS2)
Output Frequency (CLKOS3 cascaded from
CLKOS2)
PLL VCO Frequency
Phase Detector Input Frequency
Output Clock Duty Cycle
Edge Duty Trim Accuracy
Output Phase Accuracy
Output Clock Period Jitter
Output Clock Cycle-to-cycle Jitter
Output Clock Phase Jitter
Output Clock Period Jitter (Fractional-N)
Output Clock Cycle-to-cycle Jitter 
(Fractional-N)
Static Phase Offset
Output Clock Pulse Width
PLL Lock-in Time
PLL Unlock Time
Input Clock Period Jitter
Input Clock High Time
Input Clock Low Time
STANDBY High to PLL Stable
RST/RESETM Pulse Width
RST Recovery Time
RESETC/D Pulse Width
RESETC/D Recovery Time
PHASESTEP Setup Time
Descriptions
Over Recommended Operating Conditions
3-31
Without duty trim selected
f
f
f
f
f
f
f
f
f
f
Divider ratio = integer
At 90% or 10%
f
f
90% to 90%
10% to 10%
OUT
OUT
OUT
OUT
PFD
PFD
OUT
OUT
OUT
OUT
PFD
PFD
> 100MHz
< 100MHz
 20 MHz
< 20 MHz
> 100MHz
< 100MHz
> 100MHz
< 100MHz
> 100MHz
< 100MHz
> 100MHz
< 100MHz
Conditions
3
DC and Switching Characteristics
MachXO2 Family Data Sheet
3
1.5625
0.0122
Min.
-120
200
-75
0.9
0.5
0.5
45
10
10
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
-6
7
7
1
1
1
0.007
0.009
0.011
1,000
Max.
0.12
0.12
0.02
400
400
400
400
800
150
180
160
230
230
120
55
75
15
50
15
—
—
—
—
—
—
—
—
6
ps p-p
ps p-p
ps p-p
ps p-p
ps p-p
ps p-p
Units
UIPP
UIPP
UIPP
UIPP
UIPP
UIPP
MHz
MHz
MHz
MHz
MHz
ms
ms
ps
ns
ns
ns
ns
ns
ns
ns
ns
ns
%
%
%