MC9S12C128MFAE Freescale Semiconductor, MC9S12C128MFAE Datasheet - Page 146
![IC MCU 128K FLASH 25MHZ 48-LQFP](/photos/12/20/122066/mc9s12c128mfae_sml.jpg)
MC9S12C128MFAE
Manufacturer Part Number
MC9S12C128MFAE
Description
IC MCU 128K FLASH 25MHZ 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Specifications of MC9S12C128MFAE
Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
CAN, EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
31
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-LQFP
Processor Series
S12C
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
4 KB
Interface Type
CAN/SCI/SPI
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
31
Number Of Timers
8
Operating Supply Voltage
3.3 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
M68EVB912C32EE
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Package
48LQFP
Family Name
HCS12
Maximum Speed
25 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC9S12C128MFAE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Chapter 4 Multiplexed External Bus Interface (MEBIV3)
This register is not in the on-chip memory map in expanded and special peripheral modes. Therefore, these
accesses will be echoed externally.
4.3.2.11
Read: Anytime (provided this register is in the map)
Write: Anytime (provided this register is in the map)
This register is used to select reduced drive for the pins associated with the core ports. This gives reduced
power consumption and reduced RFI with a slight increase in transition time (depending on loading). This
feature would be used on ports which have a light loading. The reduced drive function is independent of
which function is being used on a particular port.
This register is not in the on-chip memory map in expanded and special peripheral modes. Therefore, these
accesses will be echoed externally.
146
Module Base + 0x000D
Starting address location affected by INITRG register setting.
PUPKE
PUPEE
PUPBE
PUPAE
Field
7
4
1
0
Reset
W
R
Pull resistors Port K Enable
0 Port K pull resistors are disabled.
1 Enable pull resistors for port K input pins.
Pull resistors Port E Enable
0 Port E pull resistors on bits 7, 4:0 are disabled.
1 Enable pull resistors for port E input pins bits 7, 4:0.
Note: Pins 5 and 6 of port E have pull resistors which are only enabled during reset. This bit has no effect on
Pull resistors Port B Enable
0 Port B pull resistors are disabled.
1 Enable pull resistors for all port B input pins.
Pull resistors Port A Enable
0 Port A pull resistors are disabled.
1 Enable pull resistors for all port A input pins.
Reduced Drive Register (RDRIV)
RDRK
These bits have no effect when the associated pin(s) are outputs. (The pull
resistors are inactive.)
0
7
these pins.
= Unimplemented or Reserved
0
0
6
Figure 4-15. Reduced Drive Register (RDRIV)
Table 4-9. PUCR Field Descriptions
MC9S12C-Family / MC9S12GC-Family
0
0
5
Rev 01.24
NOTE
RDPE
0
4
Description
3
0
0
2
0
0
Freescale Semiconductor
RDPB
0
1
RDPA
0
0
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