MC9S12C128MFAE Freescale Semiconductor, MC9S12C128MFAE Datasheet - Page 676
![IC MCU 128K FLASH 25MHZ 48-LQFP](/photos/12/20/122066/mc9s12c128mfae_sml.jpg)
MC9S12C128MFAE
Manufacturer Part Number
MC9S12C128MFAE
Description
IC MCU 128K FLASH 25MHZ 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Specifications of MC9S12C128MFAE
Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
CAN, EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
31
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-LQFP
Processor Series
S12C
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
4 KB
Interface Type
CAN/SCI/SPI
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
31
Number Of Timers
8
Operating Supply Voltage
3.3 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
M68EVB912C32EE
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Package
48LQFP
Family Name
HCS12
Maximum Speed
25 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC9S12C128MFAE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Appendix A Electrical Characteristics
In
In
1. t
676
Num
10
11
12
13
bus
Figure A-9
Table A-22
1
1
2
3
4
5
6
7
8
9
(CPOL = 0)
(CPOL = 1)
(OUTPUT)
added due to internal synchronization delay
(INPUT)
NOTE: Not defined!
(INPUT)
(INPUT)
(INPUT)
MISO
MOSI
SCK
SCK
SS
C
D
P
D
D
D
D
D
D
D
D
D
D
D
D
the timing diagram for slave mode with transmission format CPHA=1 is depicted.
the timing characteristics for slave mode are listed.
SCK Frequency
SCK Period
Enable Lead Time
Enable Lag Time
Clock (SCK) High or Low Time
Data Setup Time (Inputs)
Data Hold Time (Inputs)
Slave Access Time (time to data active)
Slave MISO Disable Time
Data Valid after SCK Edge
Data Valid after SS fall
Data Hold Time (Outputs)
Rise and Fall Time Inputs
Rise and Fall Time Outputs
note
see
7
2
SLAVE
4
5
Table A-22. SPI Slave Mode Timing Characteristics
9
MSB IN
Characteristic
1
Figure A-9. SPI Slave Timing (CPHA=1)
MSB OUT
6
4
MC9S12C-Family / MC9S12GC-Family
12
12
11
BIT 6 . . . 1
BIT 6 . . . 1
Rev 01.24
Symbol
t
t
t
f
t
wsck
t
t
t
vsck
lead
t
t
t
sck
sck
t
vss
t
lag
t
dis
ho
rfo
su
hi
rfi
a
13
13
SLAVE LSB OUT
3
Min
DC
20
LSB IN
—
—
—
—
—
—
4
4
4
4
8
8
Typ
—
—
—
—
—
—
—
—
—
—
—
—
—
—
8
Freescale Semiconductor
30 + t
30 + t
Max
1/4
—
—
—
—
—
20
22
—
(1)
∞
8
8
bus
bus
1
Unit
f
t
t
t
t
ns
ns
ns
ns
ns
ns
ns
bus
bus
bus
bus
bus
ns
ns
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