MC9S12C128MFAE Freescale Semiconductor, MC9S12C128MFAE Datasheet - Page 469
![IC MCU 128K FLASH 25MHZ 48-LQFP](/photos/12/20/122066/mc9s12c128mfae_sml.jpg)
MC9S12C128MFAE
Manufacturer Part Number
MC9S12C128MFAE
Description
IC MCU 128K FLASH 25MHZ 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Specifications of MC9S12C128MFAE
Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
CAN, EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
31
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-LQFP
Processor Series
S12C
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
4 KB
Interface Type
CAN/SCI/SPI
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
31
Number Of Timers
8
Operating Supply Voltage
3.3 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
M68EVB912C32EE
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Package
48LQFP
Family Name
HCS12
Maximum Speed
25 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC9S12C128MFAE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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16.5
This subsection describes how VREG3V3V2 controls the reset of the MCU.The reset values of registers
and signals are provided in
are listed in
16.5.1
During chip power-up the digital core may not work if its supply voltage V
deassertion level (V
kept high until V
continues the start-up sequence. The power-on reset is active in all operation modes of VREG3V3V2.
16.5.2
For details on low-voltage reset see
16.6
This subsection describes all interrupts originated by VREG3V3V2.
The interrupt vectors requested by VREG3V3V2 are listed in
priorities are defined at MCU level.
16.6.1
In FPM VREG3V3V2 monitors the input voltage V
status bit LVDS is set to 1. Vice versa, LVDS is reset to 0 when V
interrupt, indicated by flag LVIF = 1, is triggered by any change of the status bit LVDS if interrupt enable
bit LVIE = 1.
Freescale Semiconductor
Resets
Interrupts
Power-On Reset
Low-Voltage Reset
LVI — Low-Voltage Interrupt
Table
Low Voltage Interrupt (LVI)
On entering the Reduced Power Mode, the LVIF is not cleared by the
VREG3V3V2.
Power-on reset
Low-voltage reset
DD
16-4.
PORD
Interrupt Source
exceeds V
Reset Source
). Therefore, signal POR which forces the other blocks of the device into reset is
Section 16.3, “Memory Map and Register
PORD
Table 16-5. VREG3V3V2 — Interrupt Vectors
Table 16-4. VREG3V3V2 — Reset Sources
Section 16.4.6, “LVR — Low-Voltage
. Then POR becomes low and the reset generator of the device
MC9S12C-Family / MC9S12GC-Family
Always active
Available only in Full Performance Mode
LVIE = 1; Available only in Full Performance Mode
Chapter 16 Dual Output Voltage Regulator (VREG3V3V2) Block Description
Rev 01.24
NOTE
DDA
. Whenever V
Local Enable
Local Enable
Table
DDA
16-5. Vector addresses and interrupt
Definition”. Possible reset sources
DDA
rises above level V
drops below level V
DD
Reset”.
is below the POR
LVID
. An
LVIA
the
469
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