MC9S12C128MFAE Freescale Semiconductor, MC9S12C128MFAE Datasheet - Page 666
![IC MCU 128K FLASH 25MHZ 48-LQFP](/photos/12/20/122066/mc9s12c128mfae_sml.jpg)
MC9S12C128MFAE
Manufacturer Part Number
MC9S12C128MFAE
Description
IC MCU 128K FLASH 25MHZ 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Specifications of MC9S12C128MFAE
Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
CAN, EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
31
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-LQFP
Processor Series
S12C
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
4 KB
Interface Type
CAN/SCI/SPI
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
31
Number Of Timers
8
Operating Supply Voltage
3.3 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
M68EVB912C32EE
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Package
48LQFP
Family Name
HCS12
Maximum Speed
25 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC9S12C128MFAE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Appendix A Electrical Characteristics
A.4.3
The oscillator provides the reference clock for the PLL. The PLL´s Voltage Controlled Oscillator (VCO)
is also the system clock source in self clock mode.
A.4.3.1
This section describes the selection of the XFC components to achieve a good filter characteristics.
The following procedure can be used to calculate the resistance and capacitance values using typical values
for K
The grey boxes show the calculation for f
for f
The VCO Gain at the desired VCO frequency is approximated by:
The phase detector relationship is given by:
i
666
ch
is the current in tracking mode.
OSC
1
, f
1
= 4MHz and a 25MHz bus clock.
f
and i
osc
Phase Locked Loop
XFC Component Selection
ch
from
refdv+1
K
V
1
Table
=
K
K
Φ
A-17.
f
ref
1
=
Figure A-2. Basic PLL Functional Diagram
⋅
V
e
DDPLL
–
(
---------------------- -
f
K
MC9S12C-Family / MC9S12GC-Family
i
1
ch
1
–
⋅
D
f
1V
VCO
f
vco
⋅
cmp
K
Cp
=
)
Cs
V
= 50MHz and f
–
Detector
Loop Divider
Phase
Rev 01.24
100
synr+1
KF
R
1
⋅
e
= 316.7Hz/Ω
(
--------------------- -
60 50
–
100
–
ref
= 1MHz. E.g., these frequencies are used
XFC Pin
)
= -90.48MHz/V
1
2
VCO
KV
Freescale Semiconductor
f
vco
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