MC9S12C128MFAE Freescale Semiconductor, MC9S12C128MFAE Datasheet - Page 277
![IC MCU 128K FLASH 25MHZ 48-LQFP](/photos/12/20/122066/mc9s12c128mfae_sml.jpg)
MC9S12C128MFAE
Manufacturer Part Number
MC9S12C128MFAE
Description
IC MCU 128K FLASH 25MHZ 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Specifications of MC9S12C128MFAE
Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
CAN, EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
31
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-LQFP
Processor Series
S12C
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
4 KB
Interface Type
CAN/SCI/SPI
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
31
Number Of Timers
8
Operating Supply Voltage
3.3 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
M68EVB912C32EE
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Package
48LQFP
Family Name
HCS12
Maximum Speed
25 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC9S12C128MFAE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Freescale Semiconductor
CME
0
1
1
SCME
X
0
1
SCMIE
X
X
0
Clock failure -->
Clock failure -->
Clock failure -->
Scenario 1: OSCCLK recovers prior to exiting Wait Mode.
– CM no longer indicates a failure,
Some time later either a wakeup interrupt occurs (no SCM interrupt)
or an External Reset is applied.
Scenario 2: OSCCLK does not recover prior to exiting Wait Mode.
Some time later either a wakeup interrupt occurs (no SCM interrupt)
No action, clock loss not detected.
CRG performs Clock Monitor Reset immediately
– MCU remains in Wait Mode,
– VREG enabled,
– PLL enabled,
– SCM activated,
– Start Clock Quality Check,
– Set SCMIF interrupt flag.
Some time later OSCCLK recovers.
– 4096 OSCCLK cycles later Clock Quality Check indicates clock o.k.,
– SCM deactivated,
– PLL disabled depending on PLLWAI,
– VREG remains enabled (never gets disabled in Wait Mode).
– MCU remains in Wait Mode.
– Exit Wait Mode using OSCCLK as system clock (SYSCLK),
– Continue normal operation.
– Exit Wait Mode using OSCCLK as system clock,
– Start reset sequence.
– MCU remains in Wait Mode,
– VREG enabled,
– PLL enabled,
– SCM activated,
– Start Clock Quality Check,
– Set SCMIF interrupt flag,
– Keep performing Clock Quality Checks (could continue infinitely)
– Exit Wait Mode in SCM using PLL clock (f
– Continue to perform additional Clock Quality Checks until OSCCLK
or an External RESET is applied.
– Exit Wait Mode in SCM using PLL clock (f
– Start reset sequence,
– Continue to perform additional Clock Quality Checks until OSCCLK
Table 9-11. Outcome of Clock Loss in Wait Mode
is o.k. again.
is o.k.again.
while in Wait Mode.
MC9S12C-Family / MC9S12GC-Family
Rev 01.24
Chapter 9 Clocks and Reset Generator (CRGV4) Block Description
CRG Actions
SCM
SCM
) as system clock,
) as system clock,
277
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