MPC555LFMZP40 Freescale Semiconductor, MPC555LFMZP40 Datasheet - Page 218

• Manufacturer Part Number: MPC555LFMZP40
• Description: IC MCU 32BIT 40MHZ 272-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC555LFMZP40

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 101
• Program Memory Size: 448KB (448K x 8)
• Program Memory Type: FLASH
• Ram Size: 26K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 272-PBGA
• Controller Family/series: POWER 5xx
• Ram Memory Size: 26KB
• Cpu Speed: 63MIPS
• Embedded Interface Type: QSPI, SCI, TouCAN
• Operating Temperature Range: -40°C To +125°C
• No. Of Pins: 272
• Rohs Compliant: No
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 26 KB
• Interface Type: CAN, QSPI, SCI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 101
• Operating Supply Voltage: 3.3 V to 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: MPC555CMEE
• Minimum Operating Temperature: - 85 C
• On-chip Adc: 10 bit, 32 Channel
• Cpu Family: MPC55xx
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 40MHz
• Total Internal Ram Size: 32KB
• # I/os (max): 101
• Operating Supply Voltage (typ): 5V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 272
• Package Type: BGA
• For Use With: MPC555CMEE - KIT EVAL FOR MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

MPC555
USER’S MANUAL
ority levels. Each one of the SIU internal interrupt sources, as well as the interrupt re-
quests generated by the IMB3 modules, can be assigned by the software to any one
of those eight interrupt priority levels.
The same interrupt request signal that is generated within the RCPU is optionally driv-
en on the IRQ_OUT pin. This pin may be used in peripheral mode, in which the internal
processor is shut off and the internal modules are accessed externally.
The IMB3 interrupts are controlled by the UIMB. The IMB3 provides 32 interrupt levels.
Any interrupt source can be configured to any IMB3 interrupt level. The 32-bit UIPEND
register in the UIMB holds the pending IMB3 interrupt requests. IMB3 interrupt request
levels zero to six are mapped to USIU interrupt levels zero to six, respectively. IMB3
interrupt request levels seven to 31 are mapped to USIU request level seven. The user
must read the UIPEND register to determine the actual source of the interrupt. Refer
to
Figure 6-5
12.4 Interrupt Operation
/
MPC556
If the same interrupt level is assigned to more than one source, soft-
ware must read the appropriate status bits in the appropriate UIMB3
registers to determine which interrupt was asserted.
illustrates the operation of the interrupt controller.
Freescale Semiconductor, Inc.
SYSTEM CONFIGURATION AND PROTECTION
For More Information On This Product,
for more information.
Go to: www.freescale.com
Rev. 15 October 2000
NOTE
MOTOROLA
6-10