MPC555LFMZP40 Freescale Semiconductor, MPC555LFMZP40 Datasheet - Page 245

• Manufacturer Part Number: MPC555LFMZP40
• Description: IC MCU 32BIT 40MHZ 272-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC555LFMZP40

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 101
• Program Memory Size: 448KB (448K x 8)
• Program Memory Type: FLASH
• Ram Size: 26K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 272-PBGA
• Controller Family/series: POWER 5xx
• Ram Memory Size: 26KB
• Cpu Speed: 63MIPS
• Embedded Interface Type: QSPI, SCI, TouCAN
• Operating Temperature Range: -40°C To +125°C
• No. Of Pins: 272
• Rohs Compliant: No
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 26 KB
• Interface Type: CAN, QSPI, SCI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 101
• Operating Supply Voltage: 3.3 V to 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: MPC555CMEE
• Minimum Operating Temperature: - 85 C
• On-chip Adc: 10 bit, 32 Channel
• Cpu Family: MPC55xx
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 40MHz
• Total Internal Ram Size: 32KB
• # I/os (max): 101
• Operating Supply Voltage (typ): 5V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 272
• Package Type: BGA
• For Use With: MPC555CMEE - KIT EVAL FOR MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

6.13.5.3 SGPIO Control Register (SGPIOCR)
MPC555
USER’S MANUAL
SGPIOCR — SGPIO Control Register
GDDR
MSB
Bit(s)
Bit(s)
16:23
24:31
22:23
24:31
16
8:15
8:15
0
0
0
0
0:7
0:7
RESET:
RESET:
16
17
18
19
20
21
GDDR
17
/
1
0
1
0
SGPIOA[8:15]
SGPIOC[0:7]
MPC556
SDDRC[0:7]
SGPIOA
SGPIOA
SDDRD
GDDR0
GDDR1
GDDR2
GDDR3
GDDR4
GDDR5
[16:23]
[24:31]
[24:31]
Name
Name
GDDR
18
—
—
2
0
2
0
GDDR
SDDRC[0:7]
19
3
0
3
0
SIU general-purpose I/O Group C[0:7]. This 8-bit register controls the data of the general-
purpose I/O pins SGPIOC[0:7]. The direction of SGPIOC[0:7] is controlled by 8 dedicated
direction control signals SDDRC[0:7] in the SGPIO control register. Each pin in this group
can be configured separately as general-purpose input or output.
NOTE: Bit 0 controls SGPIOC0, bit 1 controls SGPIOC1, etc.
SIU general-purpose I/O Group A[8:15]. This 8-bit register controls the data of the general-
purpose I/O pins SGPIOA[8:15]. The GDDR3 bit in the SGPIO control register configures
these pins as a group as general-purpose input or output.
SIU general-purpose I/O Group A[16:23]. This 8-bit register controls the data of the gener-
al-purpose I/O pins SGPIOA[16:23]. The GDDR4 bit in the SGPIO control register config-
ures these pins as a group as general-purpose input or output.
SIU general-purpose I/O Group A[24:31]. This 8-bit register controls the data of the gener-
al-purpose I/O pins SGPIOA[24:31]. The GDDR5 bit in the SGPIO control register config-
ures these pins as a group as general-purpose input or output.
SGPIO data direction for SGPIOC[0:7]. Each SDDR bit zero to seven controls the direction
of the corresponding SGPIOC pin zero to seven
Reserved
Group data direction for SGPIOD[0:7]
Group data direction for SGPIOD[8:15]
Group data direction for SGPIOD[16:23]
Group data direction for SGPIOA[8:15]
Group data direction for SGPIOA[16:23]
Group data direction for SGPIOA[24:31]
Reserved
SGPIO data direction for SGPIOD[24:31]. Each SDDRD bit 24:31 controls the direction of
the corresponding SGPIOD pin [24:31].
GDDR
Freescale Semiconductor, Inc.
Table 6-22 SGPIODT2 Bit Descriptions
SYSTEM CONFIGURATION AND PROTECTION
Table 6-23 SGPIOCR Bit Descriptions
20
4
0
4
0
For More Information On This Product,
GDDR
21
5
0
5
0
Go to: www.freescale.com
Rev. 15 October 2000
RESERVED
22
6
0
0
23
7
0
0
24
8
0
0
Description
Description
25
9
0
0
10
26
0
0
SDDRD[24:31]
RESERVED
11
27
0
0
12
28
0
0
13
29
0
0
0x2F C02C
MOTOROLA
14
30
0
0
LSB
15
31
6-37
0
0