MPC555LFMZP40 Freescale Semiconductor, MPC555LFMZP40 Datasheet - Page 743

• Manufacturer Part Number: MPC555LFMZP40
• Description: IC MCU 32BIT 40MHZ 272-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC555LFMZP40

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 101
• Program Memory Size: 448KB (448K x 8)
• Program Memory Type: FLASH
• Ram Size: 26K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 272-PBGA
• Controller Family/series: POWER 5xx
• Ram Memory Size: 26KB
• Cpu Speed: 63MIPS
• Embedded Interface Type: QSPI, SCI, TouCAN
• Operating Temperature Range: -40°C To +125°C
• No. Of Pins: 272
• Rohs Compliant: No
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 26 KB
• Interface Type: CAN, QSPI, SCI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 101
• Operating Supply Voltage: 3.3 V to 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: MPC555CMEE
• Minimum Operating Temperature: - 85 C
• On-chip Adc: 10 bit, 32 Channel
• Cpu Family: MPC55xx
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 40MHz
• Total Internal Ram Size: 32KB
• # I/os (max): 101
• Operating Supply Voltage (typ): 5V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 272
• Package Type: BGA
• For Use With: MPC555CMEE - KIT EVAL FOR MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

21.7.6 I-Bus Support Control Register
*Changing the instruction show cycle programming starts to take effect only from the second instruction after the actual
mtspr to ICTRL.
MPC555
USER’S MANUAL
ICTRL — I-Bus Support Control Register
16
0
RESET:
0
0
RESET:
If the processor aborts a fetch of the target of a direct branch (due to an exception),
the target is not always visible on the external pins. Program trace is not affected by
this phenomenon.
IWP2
CTA
17
0
/
1
0
MPC556
18
0
2
0
IWP3
19
0
3
0
SIWP0
Freescale Semiconductor, Inc.
EN
CTB
20
0
4
0
For More Information On This Product,
SIWP1
EN
21
0
5
0
DEVELOPMENT SUPPORT
Go to: www.freescale.com
SIWP2
EN
Rev. 15 October 2000
22
0
6
0
SIWP3
CTC
EN
23
0
7
0
DIWP0
EN
24
8
0
0
DIWP
EN
9
0
25
1
0
CTD
DIWP
10
EN
0
26
2
0
DIWP
11
EN
0
27
3
0
IIFM
12
0
28
0
IWP0
13
0
29
0
ISCT_SER*
MOTOROLA
SPR 158
14
0
30
0
IWP1
21-47
15
0
31
0