EP9315-CBZ Cirrus Logic Inc, EP9315-CBZ Datasheet - Page 204
EP9315-CBZ
Manufacturer Part Number
EP9315-CBZ
Description
IC ARM9 SOC ENH UNIV 352PBGA
Manufacturer
Cirrus Logic Inc
Series
EP9r
Specifications of EP9315-CBZ
Core Size
16/32-Bit
Core Processor
ARM9
Speed
200MHz
Connectivity
EBI/EMI, EIDE, Ethernet, I²C, IrDA, Keypad/Touchscreen, PCMCIA, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I²:S, LCD, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
352-BGA
Controller Family/series
(ARM9)
No. Of I/o's
16
Cpu Speed
200MHz
No. Of Timers
5
Digital Ic Case Style
BGA
Supply Voltage Range
1.65V To 1.94V, 3V To 3.6V
Embedded Interface Type
SPI
Rohs Compliant
Yes
Processor Series
EP93xx
Core
ARM920T
Data Bus Width
32 bit
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
EDB9315A-Z
Case
BGA
Dc
06+
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1144 - KIT DEVELOPMENT EP9315 ARM9
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Details
Other names
598-1139
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP9315-CBZ
Manufacturer:
CIRRUS
Quantity:
20 000
- Current page: 204 of 824
- Download datasheet (13Mb)
7
7-22
Raster Engine With Analog/LCD Integrated Timing and Interface
EP93xx User’s Guide
Frame
D18
Assuming the 3 bit input pattern that represents this 50% duty cycle grayscale is 0x3 (or
011b), the values in
up-table.
Ctr
Since all patterns must be evaluated against their specific use, no more examples for half
intensity will be offered. Instead, another example will be used to make a walking distortion
more obvious.
Take the example of a one-third luminous intensity grayscale pattern. Assume a 3Hx3Vx3F
matrix for this definition. Wanting the intensity to be evenly distributed and given the three
frame interval, any cell in the matrix should only be active for one frame. The matrix could be
filled in as in
1
Vert
D17
Ctr
1
Horz
D16
Ctr
Figure
1
Figure 7-6. Programming for One-third Luminous Intensity
VCNT (lines)
base + 0x0C
base + 0x2C
base + 0x4C
base + 0x6C
7-6.
Table 7-7
Register
Address
(pixels)
Table 7-7. Programming 50% Duty Cycle Into Lookup Table
HCNT
Frame 0
Frame 2
R
V
E
T
should be used to program this pattern into the grayscale look-
Copyright 2007 Cirrus Logic
1
1
1
1
D
1
5
0
1
1
0
1
1
1
0
D
1
4
1
0
1
0
H O R Z
1
0
0
0
1
0
1
1
0
1
D
1
3
0
1
0
1
0
1
0
0
0
1
1
1
0
0
D
1
2
1
0
0
1
0
0
1
1
0
0
1
0
1
1
D
1
1
1
0
0
1
1
0
1
0
D
1
0
1
0
1
0
1
0
0
1
D
9
0
1
0
1
Frame 1
1
0
0
0
D
8
0
1
1
0
0
1
1
1
D
7
0
1
0
1
0
1
1
0
D
6
1
0
0
1
0
1
0
1
D
5
0
1
1
0
0
0
1
0
1
0
0
D
4
1
0
1
0
1
0
0
0
0
1
1
D
3
0
1
0
1
0
1
0
0
0
1
0
D
2
0
1
1
0
0
0
0
1
D
1
1
0
0
1
0
0
D
0
0
0
1
0
1
0
GrySclLUT
Address *4
Frame
00
01
10
11
DS785UM1
Value
Pixel
011
011
011
011
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