EP9315-CBZ Cirrus Logic Inc, EP9315-CBZ Datasheet - Page 713

IC ARM9 SOC ENH UNIV 352PBGA

EP9315-CBZ

Manufacturer Part Number
EP9315-CBZ
Description
IC ARM9 SOC ENH UNIV 352PBGA
Manufacturer
Cirrus Logic Inc
Series
EP9r
Datasheets

Specifications of EP9315-CBZ

Core Size
16/32-Bit
Core Processor
ARM9
Speed
200MHz
Connectivity
EBI/EMI, EIDE, Ethernet, I²C, IrDA, Keypad/Touchscreen, PCMCIA, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I&sup2:S, LCD, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
352-BGA
Controller Family/series
(ARM9)
No. Of I/o's
16
Cpu Speed
200MHz
No. Of Timers
5
Digital Ic Case Style
BGA
Supply Voltage Range
1.65V To 1.94V, 3V To 3.6V
Embedded Interface Type
SPI
Rohs Compliant
Yes
Processor Series
EP93xx
Core
ARM920T
Data Bus Width
32 bit
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
EDB9315A-Z
Case
BGA
Dc
06+
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1144 - KIT DEVELOPMENT EP9315 ARM9
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
 Details
Other names
598-1139

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DS785UM1
23.1 Introduction
23.2 Features
The Synchronous Serial Port (SSP) is a master or slave interface for synchronous serial
communication with slave peripheral devices that have either Motorola
Semiconductor
The SSP performs serial-to-parallel conversion on data received from a peripheral device.
The CPU or DMA reads and writes data and control and status information. The transmit and
receive paths are buffered with internal FIFO memories allowing up to eight 16-bit values to
be stored independently in both transmit and receive modes. Serial data is transmitted on
SSPTXD and received on SSPRXD.
Following is a list of features of the Synchronous Serial Port.
The SSP has a programmable choice of interfaces: SPI, Microwire, or TI synchronous serial.
The features of each of these are listed below.
• Master or Slave operation
• Programmable clock bit rate and prescaler
• Separate transmit and receive FIFO memory buffers, 16-bits wide, 8 locations deep
• Programmable data frame size from 4 to 16 bits
• Independent masking of transmit FIFO, receive FIFO and receive overrun interrupts
• SPI features:
• The feature of the National Semiconductor Microwire interface is:
• Texas Instrument synchronous serial interface features:
• Full duplex, four-wire synchronous transfers
• Programmable clock polarity and phase
• Half duplex transfer using 8-bit control message
• Full duplex four-wire synchronous transfer
• Transmit data pin can be in high impedance state when not transmitting
®
Microwire
, or Texas Instruments
Copyright 2007 Cirrus Logic
23Synchronous Serial Port
®
synchronous serial interfaces.
®
SPI, National
Chapter 23
23-1
23

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