EP9315-CBZ Cirrus Logic Inc, EP9315-CBZ Datasheet - Page 666
EP9315-CBZ
Manufacturer Part Number
EP9315-CBZ
Description
IC ARM9 SOC ENH UNIV 352PBGA
Manufacturer
Cirrus Logic Inc
Series
EP9r
Specifications of EP9315-CBZ
Core Size
16/32-Bit
Core Processor
ARM9
Speed
200MHz
Connectivity
EBI/EMI, EIDE, Ethernet, I²C, IrDA, Keypad/Touchscreen, PCMCIA, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I²:S, LCD, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
352-BGA
Controller Family/series
(ARM9)
No. Of I/o's
16
Cpu Speed
200MHz
No. Of Timers
5
Digital Ic Case Style
BGA
Supply Voltage Range
1.65V To 1.94V, 3V To 3.6V
Embedded Interface Type
SPI
Rohs Compliant
Yes
Processor Series
EP93xx
Core
ARM920T
Data Bus Width
32 bit
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
EDB9315A-Z
Case
BGA
Dc
06+
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1144 - KIT DEVELOPMENT EP9315 ARM9
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Details
Other names
598-1139
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP9315-CBZ
Manufacturer:
CIRRUS
Quantity:
20 000
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- Download datasheet (13Mb)
21
21-10
I
EP93xx User’s Guide
21.5.2 Example of Right Justified LRCK format
21.6 Interrupts
2
S Controller
I
size = 32
I
size = 24
2
2
I
size = 16
S
2
S
SDATA
S
SCK
Figure 21-3
case and the MSB is transmitted first. The bit clock rate is 64x so the for the first 16 clock
cycles in each word there is no data as it is right justified in each word frame.
The I
combination (logical OR) of all TX and RX internal interrupts.
The transmitter generates 4 internal interrupts within the I
the status of the 3 individual TX FIFOs. These internal interrupts are as follows:
word
word
word
• TX0 FIFO empty.
• TX1 FIFO empty.
2
S controller generates a single interrupt, I2SINTR to the ARM Core. This interrupt is a
LRCKX
Bitclk
Bitclk
Bitclk
shows the frame format for Right Justified data. The word length is 16 in this
LRCKX LEFT
BCR = 64x, 32 pulses left word
Figure 21-3. Frame Format for Right Justified Data
16 pulses
Figure 21-2. Bit Clock Generation Example
15
24 pulses
..........
..........
32 pulses
Copyright 2007 Cirrus Logic
...............
2 1 0
BCR = 64x, 32 pulses right word
2
16 pulses
S controller. Each of these reflect
24 pulses
LRCKX RIGHT
..........
32 pulses
...............
..........
15
2 1 0
DS785UM1
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