EP9315-CBZ Cirrus Logic Inc, EP9315-CBZ Datasheet - Page 355

IC ARM9 SOC ENH UNIV 352PBGA

EP9315-CBZ

Manufacturer Part Number
EP9315-CBZ
Description
IC ARM9 SOC ENH UNIV 352PBGA
Manufacturer
Cirrus Logic Inc
Series
EP9r
Datasheets

Specifications of EP9315-CBZ

Core Size
16/32-Bit
Core Processor
ARM9
Speed
200MHz
Connectivity
EBI/EMI, EIDE, Ethernet, I²C, IrDA, Keypad/Touchscreen, PCMCIA, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I&sup2:S, LCD, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
352-BGA
Controller Family/series
(ARM9)
No. Of I/o's
16
Cpu Speed
200MHz
No. Of Timers
5
Digital Ic Case Style
BGA
Supply Voltage Range
1.65V To 1.94V, 3V To 3.6V
Embedded Interface Type
SPI
Rohs Compliant
Yes
Processor Series
EP93xx
Core
ARM920T
Data Bus Width
32 bit
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
EDB9315A-Z
Case
BGA
Dc
06+
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1144 - KIT DEVELOPMENT EP9315 ARM9
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
 Details
Other names
598-1139

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
EP9315-CBZ
Manufacturer:
Cirrus Logic Inc
Quantity:
10 000
Part Number:
EP9315-CBZ
Manufacturer:
ALTERA
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Part Number:
EP9315-CBZ
Manufacturer:
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Quantity:
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Part Number:
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Quantity:
48
IndAd
DS785UM1
47
31
15
Address:
Chip Reset:
Soft Reset:
Definition:
Bit Descriptions:
46
30
14
45
29
13
44
28
12
0x8001_0050 through 0x8001_0055 - 6 Bytes - Read/Write,
when AFP = 000b, 010b or 001b
0x0000_0000
Unchanged
Individual Address Register. There are five different Individual Addresses
accessible at offset 0x050, the Address Filter Pointer determines which one is
accessed at any one time. The first four addresses (pointer offset 0x000
through 0x011), may be used to implement destination address filters for
receive frames. The first two may also be used to qualify receive frames for
flow control processing, and the first address is used for wake-up frame
processing. The fifth address (pointer offset 0x110), is only used as the
destination address for transmit pause frames.
The least significant byte of the Individual Address corresponds to the first
byte of the address on the serial interface, with the least significant bit of the
byte corresponding to the first bit on the serial interface.
IAD:
43
27
11
42
26
10
Copyright 2007 Cirrus Logic
41
25
9
Individual Address.
40
24
8
IAD
IAD
IAD
39
23
7
38
22
6
37
21
1/10/100 Mbps Ethernet LAN Controller
5
36
20
4
35
19
3
EP93xx User’s Guide
34
18
2
33
17
1
32
16
9-53
0
9

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