EP9315-CBZ Cirrus Logic Inc, EP9315-CBZ Datasheet - Page 716

• Manufacturer Part Number: EP9315-CBZ
• Description: IC ARM9 SOC ENH UNIV 352PBGA
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9315-CBZ

• Core Size: 16/32-Bit
• Core Processor: ARM9
• Speed: 200MHz
• Connectivity: EBI/EMI, EIDE, Ethernet, I²C, IrDA, Keypad/Touchscreen, PCMCIA, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LCD, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 352-BGA
• Controller Family/series: (ARM9)
• No. Of I/o's: 16
• Cpu Speed: 200MHz
• No. Of Timers: 5
• Digital Ic Case Style: BGA
• Supply Voltage Range: 1.65V To 1.94V, 3V To 3.6V
• Embedded Interface Type: SPI
• Rohs Compliant: Yes
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: EDB9315A-Z
• Case: BGA
• Dc: 06+
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1144 - KIT DEVELOPMENT EP9315 ARM9
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 598-1139

23
23-4
Synchronous Serial Port
EP93xx User’s Guide
23.5.5 Texas Instruments
Figure 23-1
transmitted frame.
In this mode, SCLKOUT and SFRMOUT are forced LOW, and the transmit data line SSPTXD
is put in the high impedance state whenever the SSP is idle. Once the bottom entry of the
transmit FIFO contains data, SFRMOUT is pulsed HIGH for one SCLKOUT period. The value
to be transmitted is also transferred from the transmit FIFO to the serial shift register of the
transmit logic. On the next rising edge of SCLKOUT, the MSB of the 4 to 16-bit data frame is
shifted out on the SSPTXD pin. Likewise, the MSB of the received data is shifted onto the
SSPRXD pin by the off-chip serial slave device.
Both the SSP and the off-chip serial slave device then clock each data bit into their serial
shifter on the falling edge of each SCLKOUT. The received data is transferred from the serial
shifter to the receive FIFO on the first rising edge of SCLKOUT after the LSB has been
latched.
back-to-back frames are transmitted.
SSPOE (=0)
SFRMOUT /
SCLKOUT /
SCLKIN
Figure 23-1. Texas Instruments Synchronous Serial Frame Format (Single Transfer)
SSPTXD /
SSPRXD
SFRMIN
SFRMOUT /
SFRMIN
SCLKOUT /
SSPTXD /
Figure 23-2
SSPRXD
SCLKIN
SSPOE
Figure 23-2. TI Synchronous Serial Frame Format (Continuous Transfer)
shows the Texas Instruments synchronous serial frame format for a single
shows the Texas Instruments synchronous serial frame format when
®
Synchronous Serial Frame Format
Copyright 2007 Cirrus Logic
MS B
M S B
4 t o 16 bi t s
4 t o 16 bi t s
LSB
LSB
DS785UM1