EP9315-CBZ Cirrus Logic Inc, EP9315-CBZ Datasheet - Page 267

• Manufacturer Part Number: EP9315-CBZ
• Description: IC ARM9 SOC ENH UNIV 352PBGA
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9315-CBZ

• Core Size: 16/32-Bit
• Core Processor: ARM9
• Speed: 200MHz
• Connectivity: EBI/EMI, EIDE, Ethernet, I²C, IrDA, Keypad/Touchscreen, PCMCIA, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LCD, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 352-BGA
• Controller Family/series: (ARM9)
• No. Of I/o's: 16
• Cpu Speed: 200MHz
• No. Of Timers: 5
• Digital Ic Case Style: BGA
• Supply Voltage Range: 1.65V To 1.94V, 3V To 3.6V
• Embedded Interface Type: SPI
• Rohs Compliant: Yes
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: EDB9315A-Z
• Case: BGA
• Dc: 06+
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1144 - KIT DEVELOPMENT EP9315 ARM9
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 598-1139

DS785UM1
8.2.2 Remapping
8.2.3 Block Fills
8.2.4 Packed Memory Transfer
8.3 Line Draws
The Graphics Accelerator supports single bit pixel remapping with foreground/background or
foreground/transparency to system color depth images (1 bpp mapped to 4, 8, 16 or 24 bpp
expansion.) Images stored as a single bit plane can be expanded with a foreground color and
either transparent or background color. Remapping can be used for fast transfer of text,
single color patterns, and single color bit maps to video memory.
The Graphics Accelerator supports pixel addressed Block Fills and Block Copies with 4, 8,
16, or 24 bpp resolution. During Block Fills, rectangular blocks of pixels are replaced with the
pixel value that is in the
set to 0x00.
A packed source means that all bits in a word are used for the source image. The only
exception is the last word, which is not required to be used if the image size does not require
the storage. A packed source DOES NOT mean that all words are packed together. The lines
may have none, or one or more word(s) between each line. A line is defined as a continuous
block of words that contains pixel data.
In packed mode, the source can have a different layout than the destination. This is different
from non-packed mode where the
To enable a Packed Source transfer set the PACKD bit in the
The Graphics Engine supports two types of hardware accelerated lines draws:
The only programming difference between the two line draw algorithms is how the line
increment registers are set. The lines may be drawn using solid lines or patterned lines.
Accelerated line draw makes it possible to draw a single pixel width line between any two
points with sub pixel accuracy.
Note:The Graphics Accelerator only supports movement in the positive direction for X and Y. In
2. Logical Destination
3. Transparency
1. Breshenham Line Draw, or
2. Pixel Step Line Draw
other words, use the remapping function only from the display top to bottom and from the
display left to right.
“BLOCKMASK”
Copyright 2007 Cirrus Logic
“BLKSRCWIDTH”
register. For unpacked 24 bpp fills, the high byte is
and
“BLKDESTHEIGHT”
“BLOCKCTRL”
Graphics Accelerator
EP93xx User’s Guide
register.
are the same.
8-3
8