EP9315-CBZ Cirrus Logic Inc, EP9315-CBZ Datasheet - Page 249

IC ARM9 SOC ENH UNIV 352PBGA

EP9315-CBZ

Manufacturer Part Number
EP9315-CBZ
Description
IC ARM9 SOC ENH UNIV 352PBGA
Manufacturer
Cirrus Logic Inc
Series
EP9r
Datasheets

Specifications of EP9315-CBZ

Core Size
16/32-Bit
Core Processor
ARM9
Speed
200MHz
Connectivity
EBI/EMI, EIDE, Ethernet, I²C, IrDA, Keypad/Touchscreen, PCMCIA, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I&sup2:S, LCD, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
352-BGA
Controller Family/series
(ARM9)
No. Of I/o's
16
Cpu Speed
200MHz
No. Of Timers
5
Digital Ic Case Style
BGA
Supply Voltage Range
1.65V To 1.94V, 3V To 3.6V
Embedded Interface Type
SPI
Rohs Compliant
Yes
Processor Series
EP93xx
Core
ARM920T
Data Bus Width
32 bit
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
EDB9315A-Z
Case
BGA
Dc
06+
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1144 - KIT DEVELOPMENT EP9315 ARM9
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
 Details
Other names
598-1139

Available stocks

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Price
Part Number:
EP9315-CBZ
Manufacturer:
Cirrus Logic Inc
Quantity:
10 000
Part Number:
EP9315-CBZ
Manufacturer:
ALTERA
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Part Number:
EP9315-CBZ
Manufacturer:
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48
CursorAdrReset
DS785UM1
31
15
Address: 0x8003_0064
Default: 0x0000_0000
Definition: Cursor Image Address Reset register
Bit Descriptions:
30
14
29
13
28
12
ADR:
NA:
27
11
26
10
Copyright 2007 Cirrus Logic
25
9
Address - Read/Write
The Cursor Address Reset value that is written to this field
specifies the SDRAM location of the part of the cursor that
will be displayed next after reaching the last line of the
cursor.
Both start and reset locations are necessary for Dual Scan
display of cursor information. If the cursor is totally in the
upper half or lower half of the screen, the Start and Reset
locations will be the same. Otherwise the cursor will start
being overlaid on the video information at the start
address, and when the dual scan height counter
generates a carry, will jump to the reset value. The cursor
will then continue to be overlaid when the Y location is
reached, and will jump to the start address value when the
height counter for the upper half generates a carry.
Offsetting the reset value and changing the width of the
cursor to be different from the cursor step value allows the
right 48, 32, or 16 pixels of a larger cursor to be displayed
only. Furthermore, offsetting the reset X location off of the
left edge of the screen will allow pixel placement of the
cursor off of the screen edge.
Not Assigned - Will return the written value
ADR
Raster Engine With Analog/LCD Integrated Timing and Interface
24
8
ADR
23
7
22
6
21
5
20
4
19
3
EP93xx User’s Guide
18
2
17
1
NA
16
7-67
0
7

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