EP9315-CBZ Cirrus Logic Inc, EP9315-CBZ Datasheet - Page 246
EP9315-CBZ
Manufacturer Part Number
EP9315-CBZ
Description
IC ARM9 SOC ENH UNIV 352PBGA
Manufacturer
Cirrus Logic Inc
Series
EP9r
Specifications of EP9315-CBZ
Core Size
16/32-Bit
Core Processor
ARM9
Speed
200MHz
Connectivity
EBI/EMI, EIDE, Ethernet, I²C, IrDA, Keypad/Touchscreen, PCMCIA, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I²:S, LCD, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
352-BGA
Controller Family/series
(ARM9)
No. Of I/o's
16
Cpu Speed
200MHz
No. Of Timers
5
Digital Ic Case Style
BGA
Supply Voltage Range
1.65V To 1.94V, 3V To 3.6V
Embedded Interface Type
SPI
Rohs Compliant
Yes
Processor Series
EP93xx
Core
ARM920T
Data Bus Width
32 bit
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
EDB9315A-Z
Case
BGA
Dc
06+
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1144 - KIT DEVELOPMENT EP9315 ARM9
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Details
Other names
598-1139
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP9315-CBZ
Manufacturer:
CIRRUS
Quantity:
20 000
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7
BlinkPattrn
7-64
Raster Engine With Analog/LCD Integrated Timing and Interface
EP93xx User’s Guide
31
15
Bit Descriptions:
Address: 0x8003_0048
Default: 0x0000_0000
Definition: Blink Pattern register
Bit Descriptions:
30
14
29
13
28
12
RSVD:
MASK:
This register is used in conjunction with the
which pixels that are fetched from SDRAM are blink pixels (see
Register” on page
RSVD:
PATRN:
RSVD
27
11
26
10
Copyright 2007 Cirrus Logic
25
9
7-33).
Reserved - Unknown during read
Mask - Read/Write
The Blink Mask value that is written to this field is logical
ANDed, ORed, or XORed with the pixel data that
addresses the LUT. The mask allows a blinking pixel to
jump from the normal color definition location to a blink
color definition location in the look-up-table.
The logical operator is selected by writing to the M field in
the
AND/OR/XOR operation can be viewed as:
ANDing modifies the LUT address by clearing bits
ORing modifies the LUT address by setting bits
XORing modifies the LUT address by inverting bits
Reserved - Unknown during read
Pattern - Read/Write
The pixel value is first operated on by the Mask field in the
BlinkMask
blink pattern value that is written to this PATRN field. If the
comparison results in a match, the pixel is validated as a
blink pixel.
PixelMode
24
8
PATRN
register. The result is then compared to the
23
7
register. The functions of the BlinkMask
22
6
21
5
BlinkMask
20
4
PATRN
register to determine
19
3
18
2
“BlinkPattrn
17
1
DS785UM1
16
0
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