EP9315-CBZ Cirrus Logic Inc, EP9315-CBZ Datasheet - Page 618

IC ARM9 SOC ENH UNIV 352PBGA

EP9315-CBZ

Manufacturer Part Number
EP9315-CBZ
Description
IC ARM9 SOC ENH UNIV 352PBGA
Manufacturer
Cirrus Logic Inc
Series
EP9r
Datasheets

Specifications of EP9315-CBZ

Core Size
16/32-Bit
Core Processor
ARM9
Speed
200MHz
Connectivity
EBI/EMI, EIDE, Ethernet, I²C, IrDA, Keypad/Touchscreen, PCMCIA, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I&sup2:S, LCD, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
352-BGA
Controller Family/series
(ARM9)
No. Of I/o's
16
Cpu Speed
200MHz
No. Of Timers
5
Digital Ic Case Style
BGA
Supply Voltage Range
1.65V To 1.94V, 3V To 3.6V
Embedded Interface Type
SPI
Rohs Compliant
Yes
Processor Series
EP93xx
Core
ARM920T
Data Bus Width
32 bit
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
EDB9315A-Z
Case
BGA
Dc
06+
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1144 - KIT DEVELOPMENT EP9315 ARM9
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
 Details
Other names
598-1139

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17
17-22
IrDA
EP93xx User’s Guide
17.5.4.3 Bus Bandwidth Requirements
To allow sufficient time to write the received data to the receive FIFO, UARTCLK must be less
than or equal to four times the frequency of PCLK:
If the IrDA SIR functionality is required, UARTCLK must have a frequency between 2.7 MHz
and 542.7 MHz to ensure that the low-power mode transmit pulse duration complies with the
IrDA SIR specification.
There are four different IrDA modes with different bandwidth requirements. Furthermore,
there are two basic ways of moving data to or from the IrDA FIFOs:
Assuming most bytes in a packet are moved either via the DMA interface or via 32-bit word
accesses to the IrDA controller on the APB,
number of memory accesses per second to service IrDA TX or RX:
Note that the SIR mode bit rate is a worst case value.
• Direct DMA interface - this permits byte-wide access to the IrDA without using the APB.
• Accessing the IrDA via the APB - this requires APB/AHB bus bandwidth. Then, both a
The DMA block will pack/unpack individual bytes so that it reads or writes full 32-bit
words rather than individual bytes.
read and write are required for each 32-bit data word.
Infrared Mode
Slow MIR
Fast MIR
SIR
FIR
Table 17-6. IrDA Service Memory Accesses / Second
Bit Rate (bits / second)
Copyright 2007 Cirrus Logic
F
UARTCLK
1,152,000
4,000,000
576,000
115,200
4
Table 17-6
×
F
PCLK
indicates the maximum average
125,000
Bus accesses / second
18,000
36,000
DMA
3,600
250,000
36,000
72,000
7,200
APB
DS785UM1

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