AT90PWM81-16SN Atmel, AT90PWM81-16SN Datasheet - Page 11

• Manufacturer Part Number: AT90PWM81-16SN
• Description: IC MCU AVR 8K FLASH ISP 20SOIC
• Manufacturer: Atmel
• Series: AVR® 90PWM Lightingr

Specifications of AT90PWM81-16SN

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SPI
• Peripherals: Brown-out Detect/Reset, PWM, WDT
• Number Of I /o: 16
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 20-SOIC (7.5mm Width)
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: SPI
• Maximum Clock Frequency: 16 MHz
• Number Of Timers: 1
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• On-chip Dac: 10 bit, 1 Channel
• Height: 2.35 mm
• Length: 13 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.7 V
• Width: 7.6 mm
• For Use With: ATSTK600-SOIC - STK600 SOCKET/ADAPTER FOR SOIC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

3.5
3.5.1
7734P–AVR–08/10
General Purpose Register File
The X-register, Y-register, and Z-register
The Register File is optimized for the AVR Enhanced RISC instruction set. In order to achieve the
required performance and flexibility, the following input/output schemes are supported by the Register
File:
Figure 3-2
Figure 3-2.
Most of the instructions operating on the Register File have direct access to all registers, and most of them
are single cycle instructions.
As shown in
the first 32 locations of the user Data Space. Although not being physically implemented as SRAM loca-
tions, this memory organization provides great flexibility in access of the registers, as the X-, Y- and Z-
pointer registers can be set to index any register in the file.
The registers R26..R31 have some added functions to their general purpose usage. These registers are 16-
bit address pointers for indirect addressing of the data space. The three indirect address registers X, Y, and
Z are defined as described in
Figure 3-3.
General
Purpose
Working
Registers
X-register
• One 8-bit output operand and one 8-bit result input
• Two 8-bit output operands and one 8-bit result input
• Two 8-bit output operands and one 16-bit result input
• One 16-bit output operand and one 16-bit result input
shows the structure of the 32 general purpose working registers in the CPU.
Figure
AVR CPU General Purpose Working Registers
The X-, Y-, and Z-registers
3-2, each register is also assigned a data memory address, mapping them directly into
15
7
R27 (0x1B)
15
7
R0
R1
R2
…
R13
R14
R15
R16
R17
…
R26
R27
R28
R29
R30
R31
Figure
3-3.
XH
YH
0
0
Addr.
0x00
0x01
0x02
0x0D
0x0E
0x0F
0x10
0x11
0x1A
0x1B
0x1C
0x1D
0x1E
0x1F
7
R26 (0x1A)
X-register Low Byte
X-register High Byte
Y-register Low Byte
Y-register High Byte
Z-register Low Byte
Z-register High Byte
XL
YL
AT90PWM81
0
0
0
11