AT90PWM81-16SN Atmel, AT90PWM81-16SN Datasheet - Page 20
AT90PWM81-16SN
Manufacturer Part Number
AT90PWM81-16SN
Description
IC MCU AVR 8K FLASH ISP 20SOIC
Manufacturer
Atmel
Series
AVR® 90PWM Lightingr
Datasheet
1.AT90PWM81-16MN.pdf
(325 pages)
Specifications of AT90PWM81-16SN
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI
Peripherals
Brown-out Detect/Reset, PWM, WDT
Number Of I /o
16
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
20-SOIC (7.5mm Width)
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
SPI
Maximum Clock Frequency
16 MHz
Number Of Timers
1
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
On-chip Dac
10 bit, 1 Channel
Height
2.35 mm
Length
13 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2.7 V
Width
7.6 mm
For Use With
ATSTK600-SOIC - STK600 SOCKET/ADAPTER FOR SOIC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
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Manufacturer
Quantity
Price
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Part Number:
AT90PWM81-16SN
Manufacturer:
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Quantity:
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AT90PWM81
• Bits 5..4 – EEPM1 and EEPM0: EEPROM Programming Mode Bits
The EEPROM Programming mode bit setting defines which programming action that will be triggered
when writing EEWE. It is possible to program data in one atomic operation (erase the old value and pro-
gram the new value) or to split the Erase and Write operations in two different operations. The
Programming times for the different modes are shown in
EEPMn will be ignored. During reset, the EEPMn bits will be reset to 0b00 unless the EEPROM is busy
programming.
Table 4-1.
• Bit 3 – EERIE: EEPROM Ready Interrupt Enable
Writing EERIE to one enables the EEPROM Ready Interrupt if the I bit in SREG is set. Writing EERIE to
zero disables the interrupt. The EEPROM Ready interrupt generates a constant interrupt when EEWE is
cleared. The interrupt will not be generated during EEPROM write or SPM.
• Bit 2 – EEMWE: EEPROM Master Write Enable
The EEMWE bit determines whether setting EEWE to one causes the EEPROM to be written. When
EEMWE is set, setting EEWE within four clock cycles will write data to the EEPROM at the selected
address If EEMWE is zero, setting EEWE will have no effect. When EEMWE has been written to one by
software, hardware clears the bit to zero after four clock cycles. See the description of the EEWE bit for an
EEPROM write procedure.
• Bit 1 – EEWE: EEPROM Write Enable
The EEPROM Write Enable Signal EEWE is the write strobe to the EEPROM. When address and data are
correctly set up, the EEWE bit must be written to one to write the value into the EEPROM. The EEMWE
bit must be written to one before a logical one is written to EEWE, otherwise no EEPROM write takes
place. The following procedure should be followed when writing the EEPROM (the order of steps 3 and 4
is not essential):
The EEPROM can not be programmed during a CPU write to the Flash memory. The software must check
that the Flash programming is completed before initiating a new EEPROM write. Step 2 is only relevant if
the software contains a Boot Loader allowing the CPU to program the Flash. If the Flash is never being
updated by the CPU, step 2 can be omitted. See
ming” on page 232
1.
2.
3.
4.
5.
6.
EEPM1
0
0
1
1
Wait until EEWE becomes zero.
Wait until SPMEN (Store Program Memory Enable) in SPMCSR (Store Program Memory Con-
trol and Status Register) becomes zero.
Write new EEPROM address to EEAR (optional).
Write new EEPROM data to EEDR (optional).
Write a logical one to the EEMWE bit while writing a zero to EEWE in EECR.
Within four clock cycles after setting EEMWE, write a logical one to EEWE.
EEPM0
EEPROM Mode Bits
0
1
0
1
for details about Boot programming.
Programming
3.4 ms
1.8 ms
1.8 ms
Time
–
Operation
Erase and Write in one operation (Atomic Operation)
Erase Only
Write Only
Flush temporary EEPROM page buffer
“Boot Loader Support – Read-While-Write Self-Program-
Table
4-1. While EEWE is set, any write to
7734P–AVR–08/10
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