AT90PWM81-16SN Atmel, AT90PWM81-16SN Datasheet - Page 34

• Manufacturer Part Number: AT90PWM81-16SN
• Description: IC MCU AVR 8K FLASH ISP 20SOIC
• Manufacturer: Atmel
• Series: AVR® 90PWM Lightingr

Specifications of AT90PWM81-16SN

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SPI
• Peripherals: Brown-out Detect/Reset, PWM, WDT
• Number Of I /o: 16
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 20-SOIC (7.5mm Width)
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: SPI
• Maximum Clock Frequency: 16 MHz
• Number Of Timers: 1
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• On-chip Dac: 10 bit, 1 Channel
• Height: 2.35 mm
• Length: 13 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.7 V
• Width: 7.6 mm
• For Use With: ATSTK600-SOIC - STK600 SOCKET/ADAPTER FOR SOIC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 5-9.
5.2.7
34
CKSEL3..0
0100
0101
0001
AT90PWM81
Clock Output Buffer
Start-up Times when the PLL is selected as system clock
SUT1..0
00
01
10
00
01
10
00
01
10
11
11
The PLL is locked on the source oscillator which must remains close to 8 MHz to assure proper lock of
the PLL.
Both internal RC Oscillator and PLL are switched off in Power-down and Standby sleep modes
Figure 5-4.
The device can output the system clock on the CLKO pin. To enable the output, the CKOUT Fuse or
COUT bit of CLKSELR register has to be programmed. This mode is suitable when the chip clock is used
to drive other circuits on the system. Note that the clock will not be output during reset and the normal
operation of I/O pin will be overridden when the fuses are programmed. Any clock source can be selected
when the clock is output on CLKO. If the System Clock Prescaler is used, it is the divided system clock
that is output.
Start-up Time from Power-down
16K CK
16K CK
16K CK
16K CK
16K CK
1K CK
1K CK
1K CK
1K CK
1K CK
1K CK
PCK Clocking System
XT AL1
XT AL2
RC OSCILLATOR
OSCCAL
8 MHz
OSCILLATORS
CKSEL3..0
Additional Delay from Reset
14CK + 64 ms
14CK + 64 ms
14CK + 64 ms
(V
14CK + 4 ms
14CK + 4 ms
14CK + 4 ms
14CK + 4 ms
CC
14CK
14CK
14CK
14CK
PLLE
= 5.0V)
PLL
*N
PLLF3..0
Detector
Lock
DIVIDE
BY 4
External Crystal or resonator
Internal RC Oscillator
External Clock
Clock Source
CLK
PLOCK
CK
7734P–AVR–08/10
PLL
SOURCE