AT90PWM81-16SN Atmel, AT90PWM81-16SN Datasheet - Page 84

• Manufacturer Part Number: AT90PWM81-16SN
• Description: IC MCU AVR 8K FLASH ISP 20SOIC
• Manufacturer: Atmel
• Series: AVR® 90PWM Lightingr

Specifications of AT90PWM81-16SN

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SPI
• Peripherals: Brown-out Detect/Reset, PWM, WDT
• Number Of I /o: 16
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 20-SOIC (7.5mm Width)
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: SPI
• Maximum Clock Frequency: 16 MHz
• Number Of Timers: 1
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• On-chip Dac: 10 bit, 1 Channel
• Height: 2.35 mm
• Length: 13 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.7 V
• Width: 7.6 mm
• For Use With: ATSTK600-SOIC - STK600 SOCKET/ADAPTER FOR SOIC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

11. Reduced 16-bit Timer/Counter1
11.1
84
Overview
AT90PWM81
The 16-bit Timer/Counter unit allows accurate program execution timing (event management). The main
features are:
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•
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Most register and bit references in this section are written in general form. A lower case “n” replaces the
Timer/Counter number, and a lower case “x” replaces the Output Compare unit channel. However, when
using the register or bit defines in a program, the precise form must be used, i.e., TCNT1 for accessing
Timer/Counter1 counter value and so on.
A simplified block diagram of the 16-bit Timer/Counter is shown in
of I/O pins, refer to
I/O pins, are shown in bold. The device-specific I/O Register and bit locations are listed in the
Timer/Counter Register Description” on page
The PRTIM1 bit in
Timer/Counter1 module.
Clear Timer on Compare Match (Auto Reload)
One Input Capture Unit
Input Capture Noise Cancelerr
External Event Counter
Two independent interrupt Sources (TOV1, ICF1)
“Pin out description” on page
“Power Reduction Register” on page 45
96.
6. CPU accessible I/O Registers, including I/O bits and
Figure
must be written to zero to enable
11-1. For the actual placement
7734P–AVR–08/10
“16-bit