AT90PWM81-16SN Atmel, AT90PWM81-16SN Datasheet - Page 212

IC MCU AVR 8K FLASH ISP 20SOIC

AT90PWM81-16SN

Manufacturer Part Number
AT90PWM81-16SN
Description
IC MCU AVR 8K FLASH ISP 20SOIC
Manufacturer
Atmel
Series
AVR® 90PWM Lightingr
Datasheet

Specifications of AT90PWM81-16SN

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI
Peripherals
Brown-out Detect/Reset, PWM, WDT
Number Of I /o
16
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
20-SOIC (7.5mm Width)
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
SPI
Maximum Clock Frequency
16 MHz
Number Of Timers
1
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
On-chip Dac
10 bit, 1 Channel
Height
2.35 mm
Length
13 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2.7 V
Width
7.6 mm
For Use With
ATSTK600-SOIC - STK600 SOCKET/ADAPTER FOR SOIC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT90PWM81-16SN
Manufacturer:
Atmel
Quantity:
1 500
17.6.4
212
AT90PWM81
ADC Accuracy Definitions
differential inputs using the AMPxIS bit with both inputs unconnected.
Status register – AMP0CSR” on page
the measurement results. Using this kind of software based offset correction, offset on any channel can be
reduced below one LSB.
An n-bit single-ended ADC converts a voltage linearly between GND and V
lowest code is read as 0, and the highest code is read as 2
Several parameters describe the deviation from the ideal behavior:
Figure 17-10. Offset Error
• Offset: The deviation of the first transition (0x000 to 0x001) compared to the ideal transition (at 0.5
• Gain Error: After adjusting for offset, the Gain Error is found as the deviation of the last transition
LSB). Ideal value: 0 LSB.
(0x3FE to 0x3FF) compared to the ideal transition (at 1.5 LSB below maximum). Ideal value: 0 LSB
Output Code
Offset
Error
224.). This offset residue can be then subtracted in software from
n
-1.
V
REF
(See “Amplifier 0 Control and
REF
Input Voltage
in 2
n
Ideal ADC
Actual ADC
steps (LSBs). The
7734P–AVR–08/10

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