AT90PWM81-16SN Atmel, AT90PWM81-16SN Datasheet - Page 35

• Manufacturer Part Number: AT90PWM81-16SN
• Description: IC MCU AVR 8K FLASH ISP 20SOIC
• Manufacturer: Atmel
• Series: AVR® 90PWM Lightingr

Specifications of AT90PWM81-16SN

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SPI
• Peripherals: Brown-out Detect/Reset, PWM, WDT
• Number Of I /o: 16
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 20-SOIC (7.5mm Width)
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: SPI
• Maximum Clock Frequency: 16 MHz
• Number Of Timers: 1
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• On-chip Dac: 10 bit, 1 Channel
• Height: 2.35 mm
• Length: 13 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.7 V
• Width: 7.6 mm
• For Use With: ATSTK600-SOIC - STK600 SOCKET/ADAPTER FOR SOIC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

5.3
5.3.1
5.3.2
5.3.3
7734P–AVR–08/10
Dynamic Clock Switch
Features
Fuses substitution
Clock Source Selection
AT90PWM81 provides a powerful dynamic clock switch that allows users to turn on and off clocks of the
device on the fly. The built-in de-glitching circuitry allows clocks to be enabled or disabled asynchro-
nously. This enables efficient power management schemes to be implemented easily and quickly. In a
safety application, the dynamic clock switch circuit may continuously monitor the external clock fails.
The AT90PWM81 provides one register for Clock Fuse substitution (CLKSELR) and one register to con-
trol the dynamic clock switch circuit (CLKCSR). The watchdog is used to monitor external clock source if
needed. The control of the dynamic clock switch circuit must be supervised by software. The low level
control is performed by hardware through the CLKCSR register. The features are:
During reset, bits of the Low Fuse Byte are latched in the CLKSELR register. The content of this register
can operate as well as the Low Fuse Byte. CKSEL3..0, SUT1..0 and CKOUT fuses are substituted as
shown in
The available codes of clock source is given are in
Figure 5-5.
• Safe commands, to avoid unintentional commands, a special write procedure must be followed to
• Exclusive action, the actions are controlled by a decoding (command table). The main commands of
• Status, a status on the availability of the enabled clock and the code recovering of clock source used to
change the CLKCSR register bits
the dynamic clock switching are:
drive the system clock are provided.
– ‘Disable Clock Source’,
– ‘Enable Clock Source’,
– ‘Request for Clock Availability’,
– ‘Clock Source Switching’,
– ‘Recover System Clock Source’.
Figure 5-5 on page 35
Fuse Low Byte
SCLKRq
Fuses substitution and Clock Source Selection
Fuse:
(
*
)
: Command of Clock Control & Status Register
SCLKRq
Reset
(
*
)
and replaced respectively by CSEL3..0, CSUT1:0 and COUT.
CLKSELR
(See “CLKCSR – Clock Control & Status Register” on page
Register:
CKSEL[3..0]
SUT[1..0]
Table 5-1 on page
SEL-0
SEL-1
SEL-2
SEL-n
CKOUT
EN-0
EN-1
EN-2
EN-n
28.
Configuration
Configuration
AT90PWM81
Selected
Current
Switch
Clock
41.):
35