AT90PWM81-16SN Atmel, AT90PWM81-16SN Datasheet - Page 19
AT90PWM81-16SN
Manufacturer Part Number
AT90PWM81-16SN
Description
IC MCU AVR 8K FLASH ISP 20SOIC
Manufacturer
Atmel
Series
AVR® 90PWM Lightingr
Datasheet
1.AT90PWM81-16MN.pdf
(325 pages)
Specifications of AT90PWM81-16SN
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI
Peripherals
Brown-out Detect/Reset, PWM, WDT
Number Of I /o
16
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
20-SOIC (7.5mm Width)
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
SPI
Maximum Clock Frequency
16 MHz
Number Of Timers
1
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
On-chip Dac
10 bit, 1 Channel
Height
2.35 mm
Length
13 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2.7 V
Width
7.6 mm
For Use With
ATSTK600-SOIC - STK600 SOCKET/ADAPTER FOR SOIC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT90PWM81-16SN
Manufacturer:
Atmel
Quantity:
1 500
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4.3.2
4.3.3
4.3.4
7734P–AVR–08/10
The EEPROM Address Registers – EEARH and EEARL
The EEPROM Data Register – EEDR
The EEPROM Control Register – EECR
• Bits 15..9 – Reserved Bits
These bits are reserved bits in the AT90PWM81 and will always read as zero.
• Bits 8..0 – EEAR8..0: EEPROM Address
The EEPROM Address Registers – EEARH and EEARL specify the EEPROM address in the 512 bytes
EEPROM space. The EEPROM data bytes are addressed linearly between 0 and 511. The initial value of
EEAR is undefined. A proper value must be written before the EEPROM may be accessed.
• Bits 7..0 – EEDR7.0: EEPROM Data
For the EEPROM write operation, the EEDR Register contains the data to be written to the EEPROM in
the address given by the EEAR Register. For the EEPROM read operation, the EEDR contains the data
read out from the EEPROM at the address given by EEAR.
• Bits 7 – NVMBSY: Non-volatile memory busy
The NVMBSY bit is a status bit that indicates that the NVM memory (FLASH, EEPROM, Lock-bits) is
busy programming. Once a program operation is started, the bit will be set and it remains set until the pro-
gram operation is completed.
Bits 6 – EEPAGE: EEPROM page access (multiple bytes access mode)
Writing EEPAGE to one enables the multiple bytes access mode. That means that several bytes can be
programmed simultaneously into the EEPROM. When the EEPAGE bit has been written to one, the EEP-
AGE bit remains set until an EEPROM program operation is completed. Alternatively the bit is cleared
when the temporary EEPROM buffer is flushed in software (see EEPMn bits description). Any write to
EEPAGE while EEPE is one will be ignored. See Section “Program multiple bytes in one Atomic opera-
tion”, page 21 for details on how to load data into the temporary EEPROM page and the usage of the
EEPAGE bit.
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
15
–
EEAR7
7
R
R/W
0
X
7
NVMBSY
R/W
X
7
EEDR7
R/W
0
14
–
EEAR6
6
R
R/W
0
X
6
EEPAGE
R/W
X
6
EEDR6
R/W
0
13
–
EEAR5
5
R
R/W
0
X
5
EEPM1
R/W
X
5
EEDR5
R/W
0
12
–
EEAR4
4
R
R/W
0
X
EEDR4
0
4
EEPM0
R/W
X
4
R/W
11
–
EEAR3
3
R
R/W
0
X
3
EERIE
R/W
0
3
EEDR3
R/W
0
10
–
EEAR2
2
R
R/W
0
X
2
EEMWE
R/W
0
2
EEDR2
R/W
0
1
EEDR1
R/W
0
1
EEWE
R/W
X
9
–
EEAR1
1
R
R/W
0
X
AT90PWM81
0
EEDR0
R/W
0
0
EERE
R/W
0
8
EEAR8
EEAR0
0
R/W
R/W
X
X
EEARH
EEARL
EEDR
EECR
19
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