R8A77850ADBGV#RD0Z Renesas Electronics America, R8A77850ADBGV#RD0Z Datasheet - Page 1060

• Manufacturer Part Number: R8A77850ADBGV#RD0Z
• Description: IC SUPERH MPU ROMLESS 436-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77850ADBGV#RD0Z

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 600MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 108
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1 V ~ 1.2 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 436-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

20. Graphics Data Translation Accelerator (GDTA)
Rev.1.00 Jan. 10, 2008 Page 1028 of 1658
REJ09B0261-0100
[Step (1) Clear the MC access mask]
After the CPU sets the key code in GACMR within the bus interface,
set GACER to enable access to the MC function block.
[Step (2) Initialize the MC function block]
The CPU sets the frame width/height, input Y/UV padding size, output frame Y/U/V pointers,
past frame Y/U/V pointers, and future frame Y/U/V pointers.
[Step (3) Write IDCT data to RAM 1]
The CPU writes IDCT data to RAM 1.
[Step (4) Write commands to FIFO]
The CPU writes commands to MCCF. Eight command parameters are required,
and are written in sequence.
For details of settings, refer to section 20.3.21, MC Command FIFO (MCCF).
[Step (5) Write the end command to command FIFO]
The CPU writes the end command to MCCF.
[Step (6) Wait for an interrupt signaling processing completion]
Processing completion is judged using an interrupt from the CPU.
Is an interrupt used to recognize
Figure 20.7 MC Processing Procedure
Continuous processing?
processing completion?
Start
End
Yes
No
[Step (7) Check the register to confirm processing completion]
Processing completion is judged using the MC_END bit in GACISR.
Yes
No