R8A77850ADBGV#RD0Z Renesas Electronics America, R8A77850ADBGV#RD0Z Datasheet - Page 1071

• Manufacturer Part Number: R8A77850ADBGV#RD0Z
• Description: IC SUPERH MPU ROMLESS 436-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77850ADBGV#RD0Z

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 600MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 108
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1 V ~ 1.2 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 436-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

21.2
Table 21.1 shows the SCIF pin configuration. Since the pin functions are the same in each
channel, the channel number is omitted in the description below. The modem control pins are
available only in channel 0.
Table 21.1 Pin Configuration
Note: These pins function as serial pins by performing SCIF operation settings with the C/A bit in
Pin Name
Serial clock pin
Receive data pin
Transmit data pin
Modem control pin
Modem control pin
SCSMR, the TE, RE, CKE1, and CKE0 bits in SCSCR, and the MCE bit in SCFCR. Break
state transmission and detection can be set by SCSPTR of the SCIF.
SCIFn_RXD
Input/Output Pins
Legend:
SPTRR: Read from SCSPTR
Abbreviation
SCIF0_SCK to SCIF5_SCK
SCIF0_RXD to SCIF5_RXD
SCIF0_TXD to SCIF5_TXD
SCIF0_CTS
SCIF0_RTS
SPTRR
Figure 21.6 SCIFn_RXD Pin (n = 0 to 5)
Peripheral bus
21. Serial Communication Interface with FIFO (SCIF)
I/O
I/O
Input
Output
I/O
I/O
Rev.1.00 Jan. 10, 2008 Page 1039 of 1658
Function
Clock input/output
Receive data input
Transmit data output
Transmission enabled
Transmission request
Serial receive data
REJ09B0261-0100