R8A77850ADBGV#RD0Z Renesas Electronics America, R8A77850ADBGV#RD0Z Datasheet - Page 882

IC SUPERH MPU ROMLESS 436-BGA

R8A77850ADBGV#RD0Z

Manufacturer Part Number
R8A77850ADBGV#RD0Z
Description
IC SUPERH MPU ROMLESS 436-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7780r
Datasheet

Specifications of R8A77850ADBGV#RD0Z

Core Processor
SH-4A
Core Size
32-Bit
Speed
600MHz
Connectivity
Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
Peripherals
DMA, POR, WDT
Number Of I /o
108
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1 V ~ 1.2 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
436-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R8A77850ADBGV#RD0ZR8A77850ADBGV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Company:
Part Number:
R8A77850ADBGV#RD0Z
Manufacturer:
Renesas Electronics America
Quantity:
10 000
19. Display Unit (DU)
Rev.1.00 Jan. 10, 2008 Page 850 of 1658
REJ09B0261-0100
Bit
20
19
18
17
Bit Name
DFB5
DFB4
DFB3
DFB2
Initial
Value
0
0
0
0
R/W
R
R
R
R
Internal
Update
None
None
None
None
Description
Display Frame Buffer 5 Flag
0: The address indicated by the plane 5 display
1: The address indicated by the plane 5 display
Display Frame Buffer 4 Flag
0: The address indicated by the plane 4 display
1: The address indicated by the plane 4 display
Display Frame Buffer 3 Flag
0: The address indicated by the plane 3 display
1: The address indicated by the plane 3 display
Display Frame Buffer 2 Flag
0: The address indicated by the plane 2 display
1: The address indicated by the plane 2 display
area start address 0 register (P5DSA0R) in
plane 5 is being used as the display area start
address
area start address 1 register (P5DSA1R) in
plane 5 is being used as the display area start
address
area start address 0 register (P4DSA0R) in
plane 4 is being used as the display area start
address
area start address 1 register (P4DSA1R) in
plane 4 is being used as the display area start
address
area start address 0 register (P3DSA0R) in
plane 3 is being used as the display area start
address
area start address 1 register (P3DSA1R) in
plane 3 is being used as the display area start
address
area start address 0 register (P2DSA0R) in
plane 2 is being used as the display area start
address
area start address 1 register (P2DSA1R) in
plane 2 is being used as the display area start
address

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