R8A77850ADBGV#RD0Z Renesas Electronics America, R8A77850ADBGV#RD0Z Datasheet - Page 535

IC SUPERH MPU ROMLESS 436-BGA

R8A77850ADBGV#RD0Z

Manufacturer Part Number
R8A77850ADBGV#RD0Z
Description
IC SUPERH MPU ROMLESS 436-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7780r
Datasheet

Specifications of R8A77850ADBGV#RD0Z

Core Processor
SH-4A
Core Size
32-Bit
Speed
600MHz
Connectivity
Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
Peripherals
DMA, POR, WDT
Number Of I /o
108
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1 V ~ 1.2 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
436-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

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Notes: 1. The TREFI bit value of the DBRFCNT1 register and the LV1TH bit of this register are
Bit
15 to 8
7 to 0
2. Writing to this register should be performed only when the following condition is met.
Bit Name
LV0TH7 to
LV0TH0
When automatic issue of auto-refresh is disabled (when the ARFEN bit in the
added and the result used as the maximum value of the auto-refresh counter, that is,
the maximum interval for refresh commands when periodically issuing auto-refresh
signals. Specify the LV1TH bit value so that the maximum interval is within the
maximum value of the ACT-PRE command interval prescribed in the datasheet of the
respective memory manufacturers. For details, refer to section 12.5.5, Auto-Refresh
Operation.
DBRFCNT0 register is cleared to 0.).
Initial
Value
All 0
1000 0000 R/W
R/W
R
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
Operation when a value other than 0 is written is not
guaranteed.
These bits set the threshold cycles for executing auto-
refresh. The number of cycles is the number of DDR
clock cycles.
When single-unit requests received via the SuperHyway
bus end, auto refresh is given priority over the next
request.
Level 0 Threshold Setting Bits
Rev.1.00 Jan. 10, 2008 Page 503 of 1658
12. DDR2-SDRAM Interface (DBSC2)
REJ09B0261-0100

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