R8A77850ADBGV#RD0Z Renesas Electronics America, R8A77850ADBGV#RD0Z Datasheet - Page 12
![IC SUPERH MPU ROMLESS 436-BGA](/photos/28/62/286211/436-bfbga_sml.jpg)
R8A77850ADBGV#RD0Z
Manufacturer Part Number
R8A77850ADBGV#RD0Z
Description
IC SUPERH MPU ROMLESS 436-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7780r
Datasheet
1.R8A77850AADBGV.pdf
(1694 pages)
Specifications of R8A77850ADBGV#RD0Z
Core Processor
SH-4A
Core Size
32-Bit
Speed
600MHz
Connectivity
Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
Peripherals
DMA, POR, WDT
Number Of I /o
108
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1 V ~ 1.2 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
436-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R8A77850ADBGV#RD0ZR8A77850ADBGV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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5.3
5.4
5.5
5.6
5.7
Section 6 Floating-Point Unit (FPU)
6.1
6.2
6.3
6.4
6.5
6.6
Section 7 Memory Management Unit (MMU)
7.1
Rev.1.00 Jan. 10, 2008 Page x of xxx
REJ09B0261-0100
5.2.2
5.2.3
5.2.4
Exception Handling Functions............................................................................................. 95
5.3.1
5.3.2
Exception Types and Priorities ............................................................................................ 96
Exception Flow .................................................................................................................... 98
5.5.1
5.5.2
5.5.3
5.5.4
Description of Exceptions.................................................................................................. 102
5.6.1
5.6.2
5.6.3
5.6.4
Usage Notes ....................................................................................................................... 123
Features.............................................................................................................................. 125
Data Formats...................................................................................................................... 126
6.2.1
6.2.2
6.2.3
Register Descriptions......................................................................................................... 131
6.3.1
6.3.2
6.3.3
Rounding............................................................................................................................ 137
Floating-Point Exceptions.................................................................................................. 138
6.5.1
6.5.2
6.5.3
Graphics Support Functions............................................................................................... 140
6.6.1
6.6.2
Overview of MMU ............................................................................................................ 144
Exception Event Register (EXPEVT)................................................................... 91
Interrupt Event Register (INTEVT)...................................................................... 92
Non-Support Detection Exception Register (EXPMASK) ................................... 93
Exception Handling Flow ..................................................................................... 95
Exception Handling Vector Addresses ................................................................. 95
Exception Flow..................................................................................................... 98
Exception Source Acceptance ............................................................................ 100
Exception Requests and BL Bit .......................................................................... 101
Return from Exception Handling........................................................................ 101
Resets.................................................................................................................. 102
General Exceptions............................................................................................. 104
Interrupts............................................................................................................. 120
Priority Order with Multiple Exceptions ............................................................ 121
Floating-Point Format......................................................................................... 126
Non-Numbers (NaN) .......................................................................................... 129
Denormalized Numbers ...................................................................................... 130
Floating-Point Registers ..................................................................................... 131
Floating-Point Status/Control Register (FPSCR) ............................................... 133
Floating-Point Communication Register (FPUL) ............................................... 136
General FPU Disable Exceptions and Slot FPU Disable Exceptions ................. 138
FPU Exception Sources ...................................................................................... 138
FPU Exception Handling.................................................................................... 139
Geometric Operation Instructions....................................................................... 140
Pair Single-Precision Data Transfer.................................................................... 141
.............................................................................. 125
............................................................ 143
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