R8A77850ADBGV#RD0Z Renesas Electronics America, R8A77850ADBGV#RD0Z Datasheet - Page 345

• Manufacturer Part Number: R8A77850ADBGV#RD0Z
• Description: IC SUPERH MPU ROMLESS 436-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77850ADBGV#RD0Z

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 600MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 108
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1 V ~ 1.2 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 436-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Bit
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Initial
Value R/W Source
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W PCIC (4)
R/W PCIC (3)
R/W PCIC (2)
R/W PCIC (1)
R/W PCIC (0)
R/W HAC channel 1 Clears the HAC channel 1 interrupt
R/W HAC channel 0 Clears the HAC channel 0 interrupt
R/W DMAC (1)
R/W DMAC (0)
R/W H-UDI
R/W WDT
R/W SCIF channel 5 Clears SCIF channel 5 interrupt
R/W SCIF channel 4 Clears SCIF channel 4 interrupt
R/W SCIF channel 3 Clears SCIF channel 3 interrupt
R/W SCIF channel 2 Clears SCIF channel 2 interrupt
R/W SCIF channel 1 Clears SCIF channel 1 interrupt
R/W SCIF channel 0 Clears SCIF channel 0 interrupt
R/W TMU channels
R/W TMU channels
3 to 5
0 to 2
Function
Clears the PCIINTD interrupt
masking
Clears the PCIINTC interrupt
masking
Clears the PCIINTB interrupt
masking
Clears the PCIINTA interrupt
masking
Clears the PCISERR interrupt
masking
masking
masking
Clears DMAC channels 6 to 11
interrupt masking and address
error interrupt
Clears DMAC channels 0 to 5
interrupt masking and address
error interrupt
Clears H-UDI interrupt masking
Clears the WDT interrupt masking
masking
masking
masking
masking
masking
masking
Clears TMU channel 3 to 5
interrupt masking
Clears TMU channel 0 to 2
interrupt masking
Rev.1.00 Jan. 10, 2008 Page 313 of 1658
10. Interrupt Controller (INTC)
Description
Clears interrupt
masking for each on-
chip peripheral module
[When written]
0: Invalid
1: Clears interrupt
[When read]
Always 0
masking
REJ09B0261-0100