MRF89XA-I/MQ Microchip Technology, MRF89XA-I/MQ Datasheet - Page 31

TXRX ISM SUB-GHZ ULP 32QFN

MRF89XA-I/MQ

Manufacturer Part Number
MRF89XA-I/MQ
Description
TXRX ISM SUB-GHZ ULP 32QFN
Manufacturer
Microchip Technology
Datasheets

Specifications of MRF89XA-I/MQ

Package / Case
32-WFQFN Exposed Pad
Frequency
863MHz ~ 870MHz, 902MHz ~ 928MHz, 950MHz ~ 960MHz
Data Rate - Maximum
200kbps
Modulation Or Protocol
FSK, OOK
Applications
ISM
Power - Output
12.5dBm
Sensitivity
-113dBm
Voltage - Supply
2.1 V ~ 3.6 V
Current - Receiving
3mA
Current - Transmitting
25mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Number Of Receivers
1
Number Of Transmitters
1
Wireless Frequency
863 MHz to 870 MHz, 902 MHz to 928 MHz, 950 MHz to 960 MHz
Interface Type
SPI
Noise Figure
- 112 dBc
Output Power
- 8.5 dBm, + 12.5 dBm
Operating Supply Voltage
2.1 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Maximum Data Rate
256 Kbps
Maximum Supply Current
25 mA
Minimum Operating Temperature
- 40 C
Modulation
FSK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MRF89XA-I/MQ
Manufacturer:
MICROCHIP
Quantity:
12 000
TABLE 2-6:
© 2010 Microchip Technology Inc.
Receiver Configuration Registers: Size – 6 Bytes, Start Address – 0x14
Sync Word Configuration Registers: Size – 4 Bytes, Start Address – 0x16
Transmitter Configuration Registers: Size – 1 Byte, Start Address – 0x1A
Oscillator Configuration Registers: Size – 1 Byte, Start Address – 0x1B
Packet Handling Configuration Registers: Size – 4 Bytes, Start Address – 0x1C
Register
Address
Register
Address
Register
Address
Register
Address
Register
Address
0x1C
0x1D
0x14
0x15
0x16
0x17
0x18
0x19
0x1A
0x1B
0x1E
0x1F
RSTSREG
OOKCREG
SYNCV31REG Sync Value 1
SYNCV23REG Sync Value 2
SYNCV15REG Sync Value 3
SYNCV07REG Sync Value 4
TXCONREG
CLKOREG
PLOADREG
NADDSREG
PKTCREG
FCRCREG
Register
Register
Register
Register
Register
Name
Name
Name
Name
Name
CONFIGURATION/CONTROL/STATUS REGISTER DESCRIPTION (CONTINUED)
RSSI Status Read Register
OOK Configuration Register
Register
Register
Register
Transmit Configuration Register
Clock Output Control Register
Payload Configuration Register
Node Address Set Register
Packet Configuration Register
FIFO CRC Configuration Register
Register Description
Register Description
Register Description
Register Description
Register Description
st
nd
rd
th
Byte Configuration Register Configuring first byte of the 32-bit
Byte Configuration
Byte Configuration
Byte Configuration
Preliminary
Sync word
Node’s local address for filtering of received
packets
whitening, CRC on/off, address filtering of
received packets, CRC status
RSSI output
RSSI threshold size in OOK demodulator,
RSSI threshold period in OOK demodulator,
cut-off frequency of the OOK threshold in
demodulator
Configuring second byte of the 32-bit
Sync word
Configuring third byte of the 32-bit
Sync word
Configuring fourth byte of the 32-bit
Sync word
Transmit interpolation cut-off frequency,
power output
Clock-out control, frequency
Enable Manchester encoding/decoding,
payload length
Packet format, size of the preamble,
FIFO auto-clear (if CRC failed), FIFO
access
Related Control Functions
Related Control Functions
Related Control Functions
Related Control Functions
Related Control Functions
MRF89XA
DS70622B-page 31

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