MRF89XA-I/MQ Microchip Technology, MRF89XA-I/MQ Datasheet - Page 56

• Manufacturer Part Number: MRF89XA-I/MQ
• Description: TXRX ISM SUB-GHZ ULP 32QFN
• Manufacturer: Microchip Technology

Specifications of MRF89XA-I/MQ

• Package / Case: 32-WFQFN Exposed Pad
• Frequency: 863MHz ~ 870MHz, 902MHz ~ 928MHz, 950MHz ~ 960MHz
• Data Rate - Maximum: 200kbps
• Modulation Or Protocol: FSK, OOK
• Applications: ISM
• Power - Output: 12.5dBm
• Sensitivity: -113dBm
• Voltage - Supply: 2.1 V ~ 3.6 V
• Current - Receiving: 3mA
• Current - Transmitting: 25mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Number Of Receivers: 1
• Number Of Transmitters: 1
• Wireless Frequency: 863 MHz to 870 MHz, 902 MHz to 928 MHz, 950 MHz to 960 MHz
• Interface Type: SPI
• Noise Figure: - 112 dBc
• Output Power: - 8.5 dBm, + 12.5 dBm
• Operating Supply Voltage: 2.1 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Maximum Data Rate: 256 Kbps
• Maximum Supply Current: 25 mA
• Minimum Operating Temperature: - 40 C
• Modulation: FSK
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

2.20.4
REGISTER 2-32:
DS70622B-page 56
MRF89XA
bit 7
R = Readable bit
-n = Value at POR
r = Reserved
bit 7
bit 6
bit 5-0
ACFCRC
R/W-0
FIFO CRC CONFIGURATION
REGISTER DETAILS
ACFCRC: Auto Clear FIFO CRC bit
This bit when enabled auto clears FIFO if CRC failed for the current packet.
1 = Disabled
0 = Enabled (default)
FRWAXS: FIFO Read/Write Access bit
This bit indicate the read/write access for FIFO in Stand-by mode.
1 = Read
0 = Write (default)
Reserved<5:0>: Reserved bits; do not use
00000 = Reserved (default)
FRWAXS
R/W-0
FCRCREG: FIFO CRC CONFIGURATION REGISTER
(ADDRESS:0xIE) (POR:0x00)
W = Writable bit
‘1’ = Bit is set
—
r
—
Preliminary
r
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
—
r
—
r
© 2010 Microchip Technology Inc.
x = Bit is unknown
—
r
—
r
bit 0