MRF89XA-I/MQ Microchip Technology, MRF89XA-I/MQ Datasheet - Page 90

• Manufacturer Part Number: MRF89XA-I/MQ
• Description: TXRX ISM SUB-GHZ ULP 32QFN
• Manufacturer: Microchip Technology

Specifications of MRF89XA-I/MQ

• Package / Case: 32-WFQFN Exposed Pad
• Frequency: 863MHz ~ 870MHz, 902MHz ~ 928MHz, 950MHz ~ 960MHz
• Data Rate - Maximum: 200kbps
• Modulation Or Protocol: FSK, OOK
• Applications: ISM
• Power - Output: 12.5dBm
• Sensitivity: -113dBm
• Voltage - Supply: 2.1 V ~ 3.6 V
• Current - Receiving: 3mA
• Current - Transmitting: 25mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Number Of Receivers: 1
• Number Of Transmitters: 1
• Wireless Frequency: 863 MHz to 870 MHz, 902 MHz to 928 MHz, 950 MHz to 960 MHz
• Interface Type: SPI
• Noise Figure: - 112 dBc
• Output Power: - 8.5 dBm, + 12.5 dBm
• Operating Supply Voltage: 2.1 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Maximum Data Rate: 256 Kbps
• Maximum Supply Current: 25 mA
• Minimum Operating Temperature: - 40 C
• Modulation: FSK
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

3.11.4
The payload to be transmitted may contain long
sequences of ‘1’s and ‘0’s, which introduces a DC bias
in the transmitted signal, causing a non-uniform power
distribution spectrum. The radio signal produced has a
non-uniform power distribution over the occupied chan-
nel bandwidth. These sequences would also degrade
the performance of the demodulation and data and
clock recovery functions in the receiver, which basically
introduces data dependencies in the normal operation
of the demodulator. System performance can be
enhanced if the payload bits are randomized to reduce
DC biases and increase the number of bit transitions.
Therefore, it is useful if the transmitted data is random
and DC-free.
To handle such instances, two techniques are available
in the packet handler: Manchester encoding and Data
Whitening. However, only one of the two methods
should be enabled at a time.
3.11.4.1
Manchester encoding/decoding is enabled by setting
the MCHSTREN bit (PLOADREG<7>) and can be
used in Packet mode only. The NRZ data is converted
to Manchester code by coding ‘1’ as ‘10’ and ‘0’ as ‘01’.
Figure 3-29 illustrates Manchester encoding. NRZ data
is converted to Manchester by encoding 1 bits as 10
chip sequences, and 0 bits as 01 chip sequences.
Manchester encoding guarantees DC-balance and
frequent data transitions in the encoded data. The
maximum Manchester chip rate corresponds to the
maximum bit rate given in the Transmitter Electrical
specifications in Table 5-6.
FIGURE 3-29:
FIGURE 3-30:
DS70622B-page 90
MRF89XA
RF chips @ BR
User/NRZ bits
Manchester OFF
User/NRZ bits
Manchester ON
DC-FREE DATA MECHANISMS
Manchester Encoding
MANCHESTER DATA ENCODING
MANCHESTER ENCODING/DECODING
...
...
...
1
1
1
1/BR 1/
1
1
1
...Sync
1
1
1
0
0
0
1
1
1
0
0
0
Preliminary
0
0
0
1
1
1 0
0 0
0 0
In this case, the maximum chip rate is the maximum bit
rate given in the specifications section and the actual
bit rate is half the chip rate. Manchester encoding and
decoding is only applied to the payload and CRC
checksum while preamble and Sync word are kept
NRZ. However, the chip rate from preamble to CRC is
the same and defined by the BRVAL<6:0> bits
(BRSREG<6:0>) (Chip Rate = Bit Rate NRZ = 2 x Bit
Rate Manchester).
Manchester encoding/decoding is thus made transpar-
ent for the user, who still provides/retrieves NRZ data
to/from
encoding/decoding bit pattern in Figure 3-30.
3.11.4.2
Another technique called data whitening or scrambling
is widely used for randomizing the user data before
radio transmission. The data is whitened using a
random sequence on the TX side and dewhitened on
the RX side using the same sequence. Compared to
Manchester technique it has the advantage of retaining
the NRZ data rate (that is, actual bit rate is not halved).
The whitening/dewhitening process is enabled by
setting the WHITEN1 bit (PKTCREG<4>). A 9-bit
Linear Feedback Shift Register (LFSR) is used to
generate a random sequence. The payload and 2-byte
CRC checksum is then XORed with this random
sequence as illustrated in Figure 3-31. The data is
dewhitened on the receiver side by XORing with the
same random sequence.
Payload whitening/dewhitening is made transparent for
the user, who still provides/retrieves NRZ data to/from
the FIFO.
BR
1
1
the
Data Whitening
0
0
Payload...
0 1
FIFO.
1
1
1 0
1 0
© 2010 Microchip Technology Inc.
See
1
1
the
1
0
0
Manchester
...
...
...
t